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US6060741A Expired / Lapsed US ⏱️ 0.0 years remaining

Stacked gate structure for flash memory application

Assignee: Monterey Research LLC
•
Filing: 1998-09-16
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Granted: 2000-05-09
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Expires: 2018-09-16
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Abstract

Abstract In order to form a low resistance gate for use in a flash EPROM or EEPROM, a boron doped amorphous silicon layer is formed on an oxide layer and a layer of tungsten nitride formed thereon. A layer of tungsten silicide is then formed on the tungsten nitride layer acts as a barrier preventing "out diffusion" of a contaminating dopant, e.g., boron, and exhibits good adhesion to the amorphous silicon layer. The tungsten silicide layer, in turn, exhibits good adhesion to the tungsten nitride layer thereby preventing lifting of the silicide layer and dopant penetration.

Inventors

  • 👤 Richard J. Huang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 13:41
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/6891

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 51 words
A method of forming a semiconductor having a floating gate electrode, the method comprising: forming an amorphous silicon layer on a gate oxide layer; forming a tungsten nitride layer on the amorphous silicon layer; and forming a tungsten silicide layer on the tungsten nitride layer to form said floating gate electrode.
Claim 2
Independent Claim 51 words
A method of forming a semiconductor having a floating gate electrode, the method comprising: forming an amorphous silicon layer on a gate oxide layer; forming a tungsten nitride layer on the amorphous silicon layer; and forming a tungsten silicide layer on the tungsten nitride layer to form said floating gate electrode.
Claim 3
Dependent Claim 37 words
The method as set forth in claim 1, further comprising: forming an interpoly dielectric layer on the tungsten silicide layer, and forming a polysilicon layer on the interpoly dielectric layer, the polysilicon layer constituting a control gate.
Claim 4
Dependent Claim 14 words
The method as set forth in claim 2, further comprising depositing a dielectric layer.
Claim 5
Dependent Claim 35 words
The method as set forth in claim 1, comprising forming the tungsten nitride layer having the formula NW y , wherein y has a value which falls in the range of about 2- about 3.
Claim 6
Dependent Claim 35 words
The method as set forth in claim 1, comprising forming the tungsten silicide layer having the formula SiW x , wherein x has a value which falls in the range of about 1.7- about 2.7.
Claim 7
Dependent Claim 46 words
A semiconductor device having a floating gate electrode comprising: an amorphous silicon layer formed on a gate oxide layer; a tungsten nitride layer formed on the amorphous silicon layer; and a tungsten silicide layer formed on the tungsten nitride layer to form said floating gate electrode.
Claim 8
Dependent Claim 46 words
A semiconductor device having a floating gate electrode comprising: an amorphous silicon layer formed on a gate oxide layer; a tungsten nitride layer formed on the amorphous silicon layer; and a tungsten silicide layer formed on the tungsten nitride layer to form said floating gate electrode.
Claim 9
Dependent Claim 31 words
The gate electrode as set forth in claim 6, further comprising: an interpoly dielectric layer formed on the tungsten silicide layer; and a polysilicon layer formed on the interpoly dielectric layer.
Claim 10
Dependent Claim 32 words
The gate electrode as set forth in claim 7, further comprising a dielectric layer which encases the polysilicon layer, interpoly dielectric layer, tungsten silicide layer, tungsten nitride layer and amorphous silicon layer.
Claim 11
Dependent Claim 35 words
The gate electrode as set forth in claim 6, wherein the tungsten nitride layer has the formula WN y , wherein y has a value which falls in the range of about 2- about 3.
Claim 12
Dependent Claim 35 words
The gate electrode as set forth in claim 6, wherein the tungsten silicide layer has the formula WSi x , wherein x has a value which falls in the range of about 1.7- about 2.7.
Claim 13
Dependent Claim 25 words
The semiconductor device as set forth in claim 6, wherein the tungsten nitride layer has a thickness of about 50 Å to about 200 Å.
Claim 14
Dependent Claim 25 words
The semiconductor device as set forth in claim 7, wherein the tungsten nitride layer has a thickness of about 50 Å to about 200 Å.

References Cited (Backward Citations)

US5668394A Cited
US5536667A Cited
US5796166A Cited
US5923999A Cited
US5925918A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-05-09 2003-11-08 2004-05-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-05-09 2007-11-08 2008-05-09 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-05-09 2011-11-08 2012-05-09 $7700.00 Window Closed / Lapsed

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