US6046444A — High sensitivity active pixel with electronic shu…

Claim 1

Independent Claim 58 words

A circuit, comprising: photodetecting circuitry providing an original signal; a first FET having a gate, a drain, and a source, the first FET to provide an output current in response to receiving the original signal at the gate and a first control signal at the drain; and storage circuitry coupled to the source for receiving the output current.

Claim 2

Dependent Claim 58 words

A circuit, comprising: photodetecting circuitry providing an original signal; a first FET having a gate, a drain, and a source, the first FET to provide an output current in response to receiving the original signal at the gate and a first control signal at the drain; and storage circuitry coupled to the source for receiving the output current.

Claim 3

Dependent Claim 11 words

A circuit as in claim 1 wherein the FET is n-channel.

Claim 4

Dependent Claim 47 words

A circuit as in claim 1 wherein the photodetecting circuitry includes a reset FET coupled to a photodiode, the reset FET being coupled to receive a second control signal that is the complement of the first control signal and that provides a current for resetting the photodiode.

Claim 5

Dependent Claim 31 words

A circuit as in claim 1 wherein the storage circuitry comprises a capacitor coupled to a common supply node at one end and for receiving the output current at another end.

Claim 6

Dependent Claim 45 words

A circuit as in claim 1 further comprising an output stage having a second FET of which a gate is coupled to the storage circuitry and a source is coupled to a switch, the switch to selectively provide a current representative of the original signal.

Claim 7

Dependent Claim 56 words

A circuit as in 5 wherein said second FET is n-channel, the circuit further comprising a compensation circuit coupled between the gate of the second FET and a select input of the switch to raise the voltage at the gate of the second FET in response to a select signal being asserted at the select input.

Claim 8

Dependent Claim 56 words

A circuit as in 5 wherein said second FET is n-channel, the circuit further comprising a compensation circuit coupled between the gate of the second FET and a select input of the switch to raise the voltage at the gate of the second FET in response to a select signal being asserted at the select input.

Claim 9

Dependent Claim 72 words

A circuit as in claim 6 wherein the storage circuitry includes a first capacitor and the compensation circuit includes a second capacitor, the first and second capacitors being coupled to the gate of the second FET, the capacitance values of said first and second capacitors being selected such that the voltage at the gate is raised by at least one V T in response to the second capacitor receiving the select signal.

Claim 10

Dependent Claim 132 words

An imaging system, comprising: an optical system for being exposed to incident light; an image sensor coupled to the optical system to receive the incident light, the sensor having a plurality of pixels, each pixel having photodetecting circuitry providing an original signal representative of the incident light, an FET having a gate, a drain, and a source, the FET to provide an output current in response to receiving the original signal at the gate and a first control signal at the drain, storage circuitry coupled to the source for receiving the output current and in response providing an exposed voltage representative of the incident light, and analog-to-digital conversion circuitry coupled to the sensor for converting analog signals related to the exposed voltage in each pixel into digital signals representing raw image data.

Claim 11

Dependent Claim 132 words

An imaging system, comprising: an optical system for being exposed to incident light; an image sensor coupled to the optical system to receive the incident light, the sensor having a plurality of pixels, each pixel having photodetecting circuitry providing an original signal representative of the incident light, an FET having a gate, a drain, and a source, the FET to provide an output current in response to receiving the original signal at the gate and a first control signal at the drain, storage circuitry coupled to the source for receiving the output current and in response providing an exposed voltage representative of the incident light, and analog-to-digital conversion circuitry coupled to the sensor for converting analog signals related to the exposed voltage in each pixel into digital signals representing raw image data.

Claim 12

Dependent Claim 48 words

A system as in claim 8 further comprising means for digital signal and image processing, said means generating captured image data in response to receiving the digital signals; and an output interface for transferring the captured image data to an image processing system separate from the imaging system.

Claim 13

Dependent Claim 16 words

A system as in claim 9 further comprising display means for displaying the captured image data.

Claim 14

Dependent Claim 16 words

A system as in claim 9 further comprising an LCD to display the captured image data.

Claim 15

Dependent Claim 19 words

A system as in claim 9 further comprising a storage means for receiving and storing the captured image data.

Claim 16

Dependent Claim 18 words

A system as in claim 9 further comprising a removable memory card to store the captured image data.

Claim 17

Dependent Claim 18 words

A system as in claim 8 further comprising logic circuitry for compressing and scaling the raw image data.

Claim 18

Dependent Claim 25 words

A system as in claim 8 further comprising: a controller for managing the operations of the imaging system in response to instructions stored as firmware.

Claim 19

Dependent Claim 33 words

A system as in claim 15 wherein the controller generates the first control signal, a photodetector reset signal, and a pixel address signal for controlling operation of each pixel in the image sensor.

Claim 20

Dependent Claim 135 words

An image sensor comprising: a plurality of bitlines; and a plurality of pixels arranged as rows and columns to form an array, each pixel in one of the columns having photodetecting circuitry to provide an original signal representative of incident light detected in an integration interval, a first FET having a signal input, a control input, and signal output to provide an output current in response to receiving the original signal at the signal input and a first control signal being asserted at the control input upon completion of the integration interval, first capacitor coupled to the signal output for receiving the output current, and output stage coupled between the capacitor and a respective one of the plurality of bitlines to selectively buffer a voltage of the capacitor onto said respective one of the bitlines.

Claim 21

Dependent Claim 135 words

An image sensor comprising: a plurality of bitlines; and a plurality of pixels arranged as rows and columns to form an array, each pixel in one of the columns having photodetecting circuitry to provide an original signal representative of incident light detected in an integration interval, a first FET having a signal input, a control input, and signal output to provide an output current in response to receiving the original signal at the signal input and a first control signal being asserted at the control input upon completion of the integration interval, first capacitor coupled to the signal output for receiving the output current, and output stage coupled between the capacitor and a respective one of the plurality of bitlines to selectively buffer a voltage of the capacitor onto said respective one of the bitlines.

Claim 22

Dependent Claim 12 words

The image sensor of claim 17 wherein the first FET is n-channel.

Claim 23

Dependent Claim 47 words

The image sensor of claim 17 wherein the photodetecting circuitry includes a reset FET coupled to a photodiode, the reset FET being coupled to receive a second control signal that is the complement of the first control signal and that provides a current for resetting the photodiode.

Claim 24

Dependent Claim 40 words

The image sensor of claim 17 wherein each pixel further comprises a second FET having a gate coupled to the capacitor and a source coupled to a switch, the switch to selectively provide a current representative of the original signal.

Claim 25

Dependent Claim 58 words

The image sensor of claim 20 wherein the second FET is n-channel and each pixel further comprises a compensation circuit coupled between the gate of the second FET and a select input of the switch to raise the voltage at the gate of the second FET in response to a select signal being asserted at the select input.

Claim 26

Dependent Claim 64 words

The image sensor of claim 20 wherein the compensation circuit includes a second capacitor, the first and second capacitors being coupled to the gate of the second FET, the capacitance values of said first and second capacitors being selected such that the voltage at the gate is raised by at least one V T in response to the second capacitor receiving the select signal.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2003-04-04	2003-10-04	2004-04-04	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2007-04-04	2007-10-04	2008-04-04	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2011-04-04	2011-10-04	2012-04-04	$7700.00	Window Closed / Lapsed

High sensitivity active pixel with electronic shutter

Abstract

Inventors

Bibliographic Details

Claims Analysis

References Cited (Backward Citations)

USPTO Annuity & Maintenance Windows

Assigned Categories & Tags

Assign Category Tag