US6043967A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Early trigger of ESD protection device by a voltage pump circuit
Assignee: Winbond Electronics Corp
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Filing: 1997-10-22
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Granted: 2000-03-28
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Expires: 2017-10-22
Abstract
Abstract A transient voltage pump is provided to generate a high voltage pulse for triggering turn-on of an ESD protection device. As VDD-to-VSS voltage increases rapidly in the initial ESD event, the voltages of the high voltage pulses are larger than the trigger voltage of the ESD device while the ESD voltage is still at substantially lower voltage. These high voltage pulses are used to early trigger the NMOS transistor before the ESD transient voltage actually reaches the trigger voltage. The present invention improves the ESD performance of an ESD protection device, such as a MOSFET or bipolar transistor, which is provided for protecting the power bus or IC pins during an ESD event.
Inventors
- 👤 Shi-Tron Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 19:59
CPC Classifications
H; H02; H02H; H02H9/00; H02H9/04; H02H9/045; H02H9/046
Claims Analysis
Total Claims: 43
Claim 1
Independent Claim
95 words
An electrostatic discharge (ESD) protection structure for an integrated circuit constructed on a substrate, comprising: an ESD protection means constructed on the substrate; a high voltage generator having an output terminal for generating at least a high voltage pulse in response to an ESD transient voltage during an ESD event, said high voltage pulse having a voltage magnitude larger than the ESD transient voltage; wherein the output terminal of the high voltage generator is electrically coupled to the ESD protection means such that the high voltage pulse triggers the turn-on of the ESD protection means.
Claim 2
Dependent Claim
95 words
An electrostatic discharge (ESD) protection structure for an integrated circuit constructed on a substrate, comprising: an ESD protection means constructed on the substrate; a high voltage generator having an output terminal for generating at least a high voltage pulse in response to an ESD transient voltage during an ESD event, said high voltage pulse having a voltage magnitude larger than the ESD transient voltage; wherein the output terminal of the high voltage generator is electrically coupled to the ESD protection means such that the high voltage pulse triggers the turn-on of the ESD protection means.
Claim 3
Dependent Claim
46 words
The structure of claim 1, wherein the high voltage generator comprises: a voltage pump having an input terminal and an output 20 terminal, wherein the voltage pump, responsive to the ESD transient voltage, generates the high voltage pulse at the output terminal during the ESD event.
Claim 4
Dependent Claim
57 words
The structure of claim 2, wherein the high voltage generator comprises an oscillation means having an output terminal for generating an oscillation signal during the ESD event, and wherein the input terminal of the voltage pump electrically couples to the oscillation means for pumping the oscillation signal to generate the high voltage pulse during the ESD event.
Claim 5
Dependent Claim
28 words
The structure of claim 3, wherein the oscillation means comprises: N inverters serially connected to each other to form a ring oscillator, wherein N is an odd number.
Claim 6
Dependent Claim
65 words
The structure of claim 4, wherein the oscillation means further comprises a buffer which has an input and an output, the input of the buffer couples to an output terminal of a last one of said N inverters, the output of the buffer defines the output terminal of the oscillation means, said buffer boosts the driving strength of the oscillation signal during the ESD event.
Claim 7
Dependent Claim
59 words
The structure of claim 2, wherein the voltage pump comprises: a capacitive means having a first terminal defining the input terminal of the voltage pump, and having a second terminal defining the output terminal of the voltage pump; a voltage clamping means coupled between said output terminal of the voltage pump and a bus receiving the ESD transient voltage.
Claim 8
Dependent Claim
27 words
The structure of claim 3, further comprising a delay-switch means operative to turn on the oscillation means for at least a time period during the ESD event.
Claim 9
Dependent Claim
37 words
The structure of claim 7, wherein the oscillation means comprises: N inverters serially connected to each other, N is odd number, a last one of the N inverters generates the oscillation signal at an output terminal thereof.
Claim 10
Dependent Claim
88 words
The structure of claim 8, wherein the delay-switch means comprises: a switch means having an input node, an output node and a control node, wherein said input node connects to the output terminal of the last one of N inverters, said output node connects to an input terminal of a first one of N inverters; a control signal generator for generating a control signal to said control node of the switch means to turn on the switch means for at least a time period during the ESD event.
Claim 11
Dependent Claim
21 words
The structure of claim 9, wherein said control signal keeps said switch means off during normal operation of the integrated circuit.
Claim 12
Dependent Claim
21 words
The structure of claim 9, wherein said control signal keeps said switch means off during power-on operation of the integrated circuit.
Claim 13
Dependent Claim
39 words
The structure of claim 9, wherein said control signal generator includes an RC circuit having a resistor and a capacitor with one common joint terminal generating the control signal, the common joint terminal is connected to said control node.
Claim 14
Dependent Claim
24 words
The structure of claim 9, wherein said switch means is a MOSFET transistor, and said control node is the gate of the MOSFET transistor.
Claim 15
Dependent Claim
119 words
The structure of claim 3, wherein the oscillation means comprises: a logic gate having a first input terminal, a second input terminal and an output terminal; N inverters serially connected to each other, N being an even number, wherein an output terminal of a last one of the N inverters connects to the first input terminal of the logic gate, an input terminal of a first one of the N inverters connects to the output terminal of the logic gate; a control signal generator for generating a control signal to said second input terminal of the logic gate, the control signal selectively enables the switching of said logic gate for at least a time period during the ESD event.
Claim 16
Dependent Claim
13 words
The structure of claim 14, wherein the logic gate is a NAND gate.
Claim 17
Dependent Claim
25 words
The structure of claim 14, wherein the control signal selectively keeps said logic gate in a non-switching state during normal operation of the integrated circuit.
Claim 18
Dependent Claim
25 words
The structure of claim 14, wherein the control signal selectively keeps said logic gate in a non-switching state during power-on operation of the integrated circuit.
Claim 19
Dependent Claim
29 words
The structure of claim 14, wherein said control signal generator includes: an RC circuit having a resistor and a capacitor with one common joint terminal generating said control signal.
Claim 20
Dependent Claim
13 words
The structure of claim 6, wherein said voltage clamping means is a diode.
Claim 21
Dependent Claim
14 words
The structure of claim 6, wherein said voltage clamping means is a diode-configured MOSFET.
Claim 22
Dependent Claim
14 words
The structure of claim 1, wherein the ESD protection means is a bipolar transistor.
Claim 23
Dependent Claim
14 words
The structure of claim 1, wherein the ESD protection means is a MOSFET transistor.
Claim 24
Dependent Claim
13 words
The structure of claim 1, wherein the ESD protection means is a diode.
Claim 25
Dependent Claim
23 words
The structure of claim 1, wherein, during the ESD event, an ESD voltage is applied between a VDD pin and a VSS pin.
Claim 26
Dependent Claim
23 words
The structure of claim 1, wherein, during the ESD event, an ESD voltage is applied between an IC pin and a power-bus pin.
Claim 27
Dependent Claim
39 words
The structure of claim 25, wherein said power-bus pin is a VSS bus pin, a VDD power line is connected to said IC pin via a pull up means, said oscillation means is powered by the VDD and VSS.
Claim 28
Dependent Claim
13 words
The structure of claim 26, wherein said pull up means is a diode.
Claim 29
Dependent Claim
13 words
The structure of claim 26, wherein said pull up means is a PMOSFET.
Claim 30
Dependent Claim
74 words
The structure of claim 2, further comprising: a second voltage pump, having an output terminal, for pumping the high voltage pulse to generate another high voltage pulse at the output terminal during the ESD event, said another high voltage pulse having a voltage magnitude larger than the high voltage pulse, wherein the output terminal of the second voltage pump electrically couples to the ESD means for triggering the turn-on of the ESD protection means.
Claim 31
Dependent Claim
106 words
An electrostatic discharge (ESD) protection structure for an integrated circuit constructed on a substrate, comprising: a trigger device; an ESD protection means constructed on the substrate and adjacent to the trigger device; a high voltage generator for generating at least a high voltage pulse in response to an ESD transient voltage during an ESD event, said high voltage pulse having a voltage magnitude larger than the ESD transient voltage; wherein the output terminal of the high voltage generator electrically couples to the trigger device such that the high voltage pulse causes the breakdown of the trigger device for triggering the turn-on of the ESD protection means.
Claim 32
Dependent Claim
106 words
An electrostatic discharge (ESD) protection structure for an integrated circuit constructed on a substrate, comprising: a trigger device; an ESD protection means constructed on the substrate and adjacent to the trigger device; a high voltage generator for generating at least a high voltage pulse in response to an ESD transient voltage during an ESD event, said high voltage pulse having a voltage magnitude larger than the ESD transient voltage; wherein the output terminal of the high voltage generator electrically couples to the trigger device such that the high voltage pulse causes the breakdown of the trigger device for triggering the turn-on of the ESD protection means.
Claim 33
Dependent Claim
44 words
The structure of claim 30, wherein the high voltage generator comprises: a voltage pump having an input terminal and an output terminal, the voltage pump, responsive to the ESD transient voltage, generates the high voltage pulse at the output terminal during the ESD event.
Claim 34
Dependent Claim
57 words
The structure of claim 31, wherein the high voltage generator comprises an oscillation means having an output terminal for generating an oscillation signal during the ESD event, and wherein the input terminal of said voltage pump electrically couples to the oscillation means for pumping the oscillation signal to generate the high voltage pulse during the ESD event.
Claim 35
Independent Claim
87 words
A method for triggering an electrostatic discharge (ESD) protection circuit for an integrated circuit constructed on a substrate, the ESD protection circuit including an ESD protection means constructed on the substrate, comprising the following steps: generating an oscillation signal in response to an ESD transient voltage during an ESD event; pumping the oscillation signal to generate at least a 25 high voltage pulse having a voltage magnitude larger than the ESD transient voltage; applying said high voltage pulse to trigger the turn-on of the ESD protection means.
Claim 36
Independent Claim
87 words
A method for triggering an electrostatic discharge (ESD) protection circuit for an integrated circuit constructed on a substrate, the ESD protection circuit including an ESD protection means constructed on the substrate, comprising the following steps: generating an oscillation signal in response to an ESD transient voltage during an ESD event; pumping the oscillation signal to generate at least a 25 high voltage pulse having a voltage magnitude larger than the ESD transient voltage; applying said high voltage pulse to trigger the turn-on of the ESD protection means.
Claim 37
Independent Claim
101 words
A method for triggering an electrostatic discharge (ESD) protection circuit for an integrated circuit constructed on a substrate, the ESD protection circuit including an ESD protection means constructed on the substrate and a trigger device adjacent to the ESD protection means, comprising the following steps: generating an oscillation signal in response to an ESD transient voltage during an ESD event; pumping the oscillation signal to generate at least a high voltage pulse having a voltage magnitude larger than the ESD transient voltage; applying said high voltage pulse to trigger the trigger device to induce the turn-on of the ESD protection means.
Claim 38
Independent Claim
101 words
A method for triggering an electrostatic discharge (ESD) protection circuit for an integrated circuit constructed on a substrate, the ESD protection circuit including an ESD protection means constructed on the substrate and a trigger device adjacent to the ESD protection means, comprising the following steps: generating an oscillation signal in response to an ESD transient voltage during an ESD event; pumping the oscillation signal to generate at least a high voltage pulse having a voltage magnitude larger than the ESD transient voltage; applying said high voltage pulse to trigger the trigger device to induce the turn-on of the ESD protection means.
Claim 39
Dependent Claim
107 words
An electrostatic discharge (ESD) protection structure for an integrated circuit constructed on a substrate, comprising: an ESD protection means constructed on the substrate; a high voltage generator, having an input terminal and an output terminal, for generating a second high voltage pulse at said output terminal, responsive to a first voltage signal at the input terminal, during an ESD event, the second high voltage pulse having a magnitude larger than said first voltage signal, said output terminal being coupled to said ESD protection means; wherein the second high voltage pulse triggers turn-on of the ESD protection means to conduct a large current due to the ESD event.
Claim 40
Dependent Claim
107 words
An electrostatic discharge (ESD) protection structure for an integrated circuit constructed on a substrate, comprising: an ESD protection means constructed on the substrate; a high voltage generator, having an input terminal and an output terminal, for generating a second high voltage pulse at said output terminal, responsive to a first voltage signal at the input terminal, during an ESD event, the second high voltage pulse having a magnitude larger than said first voltage signal, said output terminal being coupled to said ESD protection means; wherein the second high voltage pulse triggers turn-on of the ESD protection means to conduct a large current due to the ESD event.
Claim 41
Dependent Claim
45 words
The structure of claim 35, wherein the high voltage generator comprises: a voltage pump having an input terminal and an output terminal, the voltage pump, responsive to the ESD transient voltage, generates the second high voltage pulse at the output terminal during the ESD event.
Claim 42
Dependent Claim
46 words
The structure of claim 35, wherein the high voltage generator comprises: an oscillation means having an output terminal for generating an oscillation signal during the ESD event; a voltage pump for pumping the oscillation signal to generate the second high voltage pulse during the ESD event.
Claim 43
Dependent Claim
59 words
The structure of claim 36, wherein the voltage pump comprises: a capacitive means having a first terminal defining the input terminal of the voltage pump, and having a second terminal defining the output terminal of the voltage pump; a voltage clamping means coupled between said output terminal of the voltage pump and a bus receiving the ESD transient voltage.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-03-28 | 2003-09-27 | 2004-03-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-03-28 | 2007-09-27 | 2008-03-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-03-28 | 2011-09-27 | 2012-03-28 | $7700.00 | Window Closed / Lapsed |