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US6043430A Expired / Lapsed US ⏱️ 0.0 years remaining

Bottom lead semiconductor chip package

Assignee: SK Hynix Inc
•
Filing: 1998-02-13
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Granted: 2000-03-28
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Expires: 2018-02-13
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Abstract

Abstract A bottom lead package is capable of increasing a memory capacity for a mounting position on a mother board by stacking several semiconductor packages such that exposed surfaces of leads on upper and lower surfaces of the package are aligned. The package includes a semiconductor chip, a plurality of lower leads attached to the lower side of the chip by an adhesive, a plurality of upper leads attached to the upper side of the chip by an adhesive and to the upper surfaces of the lower leads, wherein metal wires electrically connect the upper leads with a plurality of chip pads formed on the chip, and wherein a molding section packages the chip, the metal wires and the upper and lower leads, such that the upper and lower surfaces of the upper and lower leads, respectively, are externally exposed.

Inventors

  • 👤 Heung-Sup Chun

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 18:13
CPC Classifications
H; H10; H10W; H10W74/00; H10W74/10; H10W74/111; H10W70/00; H10W70/40; H10W70/411; H10W70/415; H10W72/00; H10W72/071; H10W72/073; H10W72/07351; H10W72/07352; H10W72/30; H10W72/321; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/851; H10W72/853; H10W72/865; H10W72/874; H10W72/884; H10W90/00; H10W90/701; H10W90/731; H10W90/736; H10W90/751; H10W90/756

Claims Analysis

Total Claims: 15
Claim 1
Independent Claim 106 words
A chip package, comprising: a chip; a plurality of lower leads that are attached to a lower side of the chip; a plurality of upper leads that are attached to an upper side of the chip and that are connected to corresponding ones of the lower leads; a plurality of conductive media that couple ones of the upper and lower leads with corresponding ones of a plurality of chip pads formed on the chip; and a molding section packaging the chip, the conductive media and the upper and lower leads such that upper and lower surfaces of the upper and lower leads, respectively, are externally exposed.
Claim 2
Dependent Claim 106 words
A chip package, comprising: a chip; a plurality of lower leads that are attached to a lower side of the chip; a plurality of upper leads that are attached to an upper side of the chip and that are connected to corresponding ones of the lower leads; a plurality of conductive media that couple ones of the upper and lower leads with corresponding ones of a plurality of chip pads formed on the chip; and a molding section packaging the chip, the conductive media and the upper and lower leads such that upper and lower surfaces of the upper and lower leads, respectively, are externally exposed.
Claim 3
Dependent Claim 17 words
The package of claim 1, wherein said plurality of conductive media comprise metal wires made of Au.
Claim 4
Dependent Claim 20 words
The package of claim 1, wherein said plurality of lower leads are attached to the chip via an insulating adhesive.
Claim 5
Dependent Claim 24 words
The package of claim 1, wherein said plurality of upper leads are attached to the upper side of the chip by an insulating adhesive.
Claim 6
Dependent Claim 26 words
The package of claim 1, wherein said plurality of upper leads are attached to corresponding chip pads of the chip via the plurality of conductive media.
Claim 7
Dependent Claim 19 words
The package of claim 5, wherein the plurality of conductive media comprise one of solder bumps and solder balls.
Claim 8
Dependent Claim 26 words
The package of claim 1, wherein the plurality of upper leads are connected to respective ones of the plurality of lower leads by a conductive adhesive.
Claim 9
Dependent Claim 30 words
The chip package of claim 1, wherein corresponding ones of said plurality of lower and upper leads are rigidly attached to one another and formed to act as monolithic units.
Claim 10
Dependent Claim 141 words
A chip package, comprising: a chip; a plurality of leads, wherein each lead has a first portion that extends above an upper surface of the chip, a middle portion, and a second portion that extends below a bottom surface of the chip, and wherein the first portions of the leads are attached to the upper surface of the chip and the second portions of the leads are attached to a bottom surface of the chip; a plurality of conductive media that couple ones of a plurality of chip pads on the chip to corresponding ones of the plurality of leads; and a molding section that packages the chip, the plurality of leads and the plurality of conductive media such that only surfaces of the first portions of the leads and surfaces of the second portions of the leads are externally exposed.
Claim 11
Dependent Claim 141 words
A chip package, comprising: a chip; a plurality of leads, wherein each lead has a first portion that extends above an upper surface of the chip, a middle portion, and a second portion that extends below a bottom surface of the chip, and wherein the first portions of the leads are attached to the upper surface of the chip and the second portions of the leads are attached to a bottom surface of the chip; a plurality of conductive media that couple ones of a plurality of chip pads on the chip to corresponding ones of the plurality of leads; and a molding section that packages the chip, the plurality of leads and the plurality of conductive media such that only surfaces of the first portions of the leads and surfaces of the second portions of the leads are externally exposed.
Claim 12
Dependent Claim 28 words
The chip package of claim 9, wherein the first portions of the leads are attached to the chip pads of the chip by the plurality of conductive media.
Claim 13
Dependent Claim 20 words
The chip package of claim 10, wherein the plurality of conductive media are one of solder balls and solder bumps.
Claim 14
Dependent Claim 16 words
The chip package of claim 9, wherein the plurality of conductive media comprise electrically conductive wires.
Claim 15
Dependent Claim 29 words
The chip package of claim 9, wherein lower surfaces of the first portions of the leads are attached to the upper surface of the chip by an insulating adhesive.

References Cited (Backward Citations)

US5583375A Cited
US5363279A Cited
US5801439A Cited
US5744827A Cited
US5770888A Cited
US5804874A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2003-03-28 2003-09-27 2004-03-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2007-03-28 2007-09-27 2008-03-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2011-03-28 2011-09-27 2012-03-28 $7700.00 Window Closed / Lapsed

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