US6037648A
Expired / Lapsed
US
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Semiconductor structure including a conductive fuse and process for fabrication thereof
Assignee: Samsung Electronics Co Ltd
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Filing: 1998-06-26
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Granted: 2000-03-14
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Expires: 2018-06-26
Abstract
Abstract A semiconductor structure comprising a semiconductor substrate, an electrically conductive level on the substrate and a metal fuse located at the conductive level wherein the fuse comprises a self-aligned dielectric etch stop layer thereon is provided along with processes for its fabrication.
Inventors
- 👤 Kenneth C. Arndt
- 👤 Jeffrey P. Gambino
- 👤 Jack A. Mandelman
- 👤 Chandrasekhar Narayan
- 👤 Rainer F. Schnabel
- 👤 Ronald J. Schutz
- 👤 Dirk Tobben
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 20:52
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/063; E; E01; E01F; E01F9/00; E01H; E01H1/00; E01H1/02; H10W20/40; H10W20/49; H10W20/493
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
64 words
A semiconductor structure comprising a semiconductor substrate; an electrically conductive level on said substrate; a conductive fuse located at said conductive level wherein said fuse comprises a self-aligned dielectric etch stop layer thereon; insulation structure located above said conductive level and in between metal lines of said conductive level but not above said fuse; and electrical interconnection to selected locations of said conductive level.
Claim 2
Dependent Claim
64 words
A semiconductor structure comprising a semiconductor substrate; an electrically conductive level on said substrate; a conductive fuse located at said conductive level wherein said fuse comprises a self-aligned dielectric etch stop layer thereon; insulation structure located above said conductive level and in between metal lines of said conductive level but not above said fuse; and electrical interconnection to selected locations of said conductive level.
Claim 3
Dependent Claim
15 words
The semiconductor structure of claim 1 wherein said dielectric etch stop layer comprises silicon nitride.
Claim 4
Dependent Claim
15 words
The semiconductor structure of claim 1 wherein said dielectric etch stop layer comprises silicon oxynitride.
Claim 5
Dependent Claim
21 words
The semiconductor structure of claim 1 wherein said self-aligned dielectric etch stop layer has a maximum thickness of about 450 nanometers.
Claim 6
Dependent Claim
22 words
The semiconductor structure of claim 1 wherein said self-aligned dielectric etch stop layer has a thickness of about 25 to 200 nanometers.
Claim 7
Dependent Claim
33 words
The semiconductor structure of claim 1 wherein said insulation layer comprises a first layer of plasma enhanced CVD silicon dioxide and a second layer of silicon oxide derived from a silane or tetraethylorthosilicate.
Claim 8
Dependent Claim
15 words
The semiconductor structure of claim 1 which further includes insulating structure above said electrical interconnection.
Claim 9
Dependent Claim
33 words
The semiconductor structure of claim 7 wherein said insulating structure above said electrical interconnection comprises a layer of silicon dioxide, and a layer of silicon nitride located above said layer of silicon dioxide.
Claim 10
Dependent Claim
17 words
The semiconductor structure of claim 8 which further includes a photosensitive polyimide layer above said silicon nitride.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-03-14 | 2003-09-13 | 2004-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-03-14 | 2007-09-13 | 2008-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-03-14 | 2011-09-13 | 2012-03-14 | $7700.00 | Window Closed / Lapsed |