Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
136 words
An amplifier circuit comprising: an input and an output; a first amplifier having a first gate bias, a first drain bias, a first signal input coupled to the input of the amplifier circuit, and a first signal output, said first amplifier comprising means for amplifying a lower power portion of a signal; a second amplifier having a second gate bias, a second drain bias, a second signal input coupled to the input of the amplifier circuit, and a second signal output, said second amplifier comprising means for amplifying a higher power portion of said signal; a first impedance inverter coupled between the first output of the first amplifier and the output of the amplifier circuit; and a second impedance inverter coupled between the second output of the second amplifier and the output of the amplifier circuit.
Claim 2
Dependent Claim
136 words
An amplifier circuit comprising: an input and an output; a first amplifier having a first gate bias, a first drain bias, a first signal input coupled to the input of the amplifier circuit, and a first signal output, said first amplifier comprising means for amplifying a lower power portion of a signal; a second amplifier having a second gate bias, a second drain bias, a second signal input coupled to the input of the amplifier circuit, and a second signal output, said second amplifier comprising means for amplifying a higher power portion of said signal; a first impedance inverter coupled between the first output of the first amplifier and the output of the amplifier circuit; and a second impedance inverter coupled between the second output of the second amplifier and the output of the amplifier circuit.
Claim 3
Dependent Claim
26 words
The amplifier circuit of claim 1 wherein the first impedance inverter comprises parallel coupled line sections, and the second impedance inverter comprises parallel coupled line sections.
Claim 4
Dependent Claim
55 words
The amplifier circuit of claim 2 wherein: said first gate bias and said second gate bias are biased substantially the same; the first drain bias is set to a first voltage; and the second drain bias is set to a second voltage, wherein the first voltage and the second voltage are not the same voltage.
Claim 5
Dependent Claim
53 words
The amplifier circuit of claim 2 wherein: said first gate bias and said second gate bias are biased differently; the first drain bias is set to a first voltage; and the second drain bias is set to a second voltage, wherein the first voltage and the second voltage are substantially the same voltage.
Claim 6
Dependent Claim
55 words
The amplifier circuit of claim 2 wherein: said first gate bias and said second gate bias are biased substantially the same; the first drain bias is set to a first voltage; and the second drain bias is set to a second voltage, wherein the first voltage and the second voltage are substantially the same voltage.
Claim 7
Dependent Claim
67 words
The amplifier circuit of claim 2 further comprising a power divider coupled between the input of the amplifier and the first input of the first amplifier, and coupled between the input of the amplifier circuit and the second input of the second amplifier, wherein the power divider divides an input signal present at the input of the amplifier circuit into two signals having substantially the same phase.
Claim 8
Dependent Claim
206 words
An amplifier circuit comprising: an input and an output; a first amplifier having a first gate bias, a first drain bias, a first signal input coupled to the input of the amplifier circuit, and a first signal output; a second amplifier having a second gate bias, a second drain bias, a second signal input coupled to the input of the amplifier circuit, and a second signal output; a third amplifier having a third gate bias, a third drain bias, a third signal input coupled to the input of the amplifier circuit, and a third signal output; a fourth amplifier having a fourth gate bias, a fourth drain bias, a fourth signal input coupled to the input of the amplifier circuit, and a fourth signal output; a first impedance inverter coupled between the first output of the first amplifier and the output of the amplifier circuit; a second impedance inverter coupled between the second output of the second amplifier and the output of the amplifier circuit; a third impedance inverter coupled between the third output of the third amplifier and the output of the amplifier circuit; and a fourth impedance inverter coupled between the fourth output of the fourth amplifier and the output of the amplifier circuit.
Claim 9
Dependent Claim
206 words
An amplifier circuit comprising: an input and an output; a first amplifier having a first gate bias, a first drain bias, a first signal input coupled to the input of the amplifier circuit, and a first signal output; a second amplifier having a second gate bias, a second drain bias, a second signal input coupled to the input of the amplifier circuit, and a second signal output; a third amplifier having a third gate bias, a third drain bias, a third signal input coupled to the input of the amplifier circuit, and a third signal output; a fourth amplifier having a fourth gate bias, a fourth drain bias, a fourth signal input coupled to the input of the amplifier circuit, and a fourth signal output; a first impedance inverter coupled between the first output of the first amplifier and the output of the amplifier circuit; a second impedance inverter coupled between the second output of the second amplifier and the output of the amplifier circuit; a third impedance inverter coupled between the third output of the third amplifier and the output of the amplifier circuit; and a fourth impedance inverter coupled between the fourth output of the fourth amplifier and the output of the amplifier circuit.
Claim 10
Dependent Claim
44 words
The amplifier circuit of claim 7 wherein the first impedance inverter comprises parallel coupled line sections, the second impedance inverter comprises parallel coupled line sections, the third impedance inverter comprises parallel coupled line sections, and the fourth impedance inverter comprises parallel coupled line sections.
Claim 11
Dependent Claim
29 words
The amplifier circuit of claim 8 wherein: said first gate bias, said second gate bias, said third gate bias, and said fourth gate bias are biased substantially the same.
Claim 12
Dependent Claim
47 words
The amplifier of claim 9 wherein the first amplifier and the second amplifier are carrier amplifiers, the third amplifier and the fourth amplifier are peaking amplifiers, and the drain biases of the peaking amplifiers are set to higher voltages than the drain biases of the carrier amplifiers.
Claim 13
Dependent Claim
33 words
The amplifier of claim 10 wherein: the drain biases of the carrier amplifiers are set to different voltages; and the drain biases of the peaking amplifiers are set to substantially the same voltage.
Claim 14
Dependent Claim
33 words
The amplifier of claim 10 wherein: the drain biases of the peaking amplifiers are set to different voltages; and the drain biases of the carrier amplifiers are set to substantially the same voltage.
Claim 15
Dependent Claim
35 words
The amplifier of claim 10 wherein: the drain biases of the carrier amplifiers are set to substantially the same voltage; and the drain biases of the peaking amplifiers are set to substantially the same voltage.
Claim 16
Dependent Claim
31 words
The amplifier of claim 9 wherein the first drain bias, the second drain bias, the third drain bias, and the fourth drain bias are all set to substantially the same voltage.
Claim 17
Dependent Claim
31 words
The amplifier of claim 8 wherein the first drain bias, the second drain bias, the third drain bias, and the fourth drain bias are all set to substantially the same voltage.
Claim 18
Dependent Claim
64 words
The amplifier of claim 15 wherein the first amplifier and the second amplifier are carrier amplifiers, the third amplifier and the fourth amplifier are peaking amplifiers, and the gate biases of the peaking amplifiers are set to voltages different than the gate biases of the carrier amplifiers such that the peaking amplifiers turn on at higher input signal power levels than the carrier amplifiers.
Claim 19
Dependent Claim
29 words
The amplifier of claim 16 wherein: the gate biases of the carrier amplifiers are biased differently; and the gate biases of the peaking amplifiers are biased substantially the same.
Claim 20
Dependent Claim
29 words
The amplifier of claim 16 wherein: the gate biases of the peaking amplifiers are biased differently; and the gate biases of the carrier amplifiers are biased substantially the same.
Claim 21
Dependent Claim
31 words
The amplifier of claim 16 wherein: the gate biases of the carrier amplifiers are biased substantially the same; and the gate biases of the peaking amplifiers are biased substantially the same.
Claim 22
Independent Claim
135 words
A method of amplifying an input signal, said method comprising the steps of: amplifying a first portion of said input signal with a first amplifier having a first drain bias, thereby producing a first amplified signal; phase shifting the first amplified signal with a first parallel coupled line, thereby producing a first phase shifted signal; amplifying a second portion of said input signal with a second amplifier having a second drain bias, wherein the second drain bias is set to a higher voltage than the first drain bias, thereby producing a second amplified signal; phase shifting the second amplified signal with a second parallel coupled line, thereby producing a second phase shifted signal; and combining the first phase shifted signal and the second phase shifted signal to produce an amplified replica of the input signal.
Claim 23
Independent Claim
135 words
A method of amplifying an input signal, said method comprising the steps of: amplifying a first portion of said input signal with a first amplifier having a first drain bias, thereby producing a first amplified signal; phase shifting the first amplified signal with a first parallel coupled line, thereby producing a first phase shifted signal; amplifying a second portion of said input signal with a second amplifier having a second drain bias, wherein the second drain bias is set to a higher voltage than the first drain bias, thereby producing a second amplified signal; phase shifting the second amplified signal with a second parallel coupled line, thereby producing a second phase shifted signal; and combining the first phase shifted signal and the second phase shifted signal to produce an amplified replica of the input signal.