US6015757A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of oxide etching with high selectivity to silicon nitride by using polysilicon layer
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1997-07-02
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Granted: 2000-01-18
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Expires: 2017-07-02
Abstract
Abstract A new method for planarization of shallow trench isolation is disclosed by using a polysilicon layer to prevent trench formed in a silicon nitride layer. The formation of the shallow trench isolation described herein includes a pad layer and a silicon nitride layer formed on a semiconductor wafer. A polysilicon layer is subsequently formed on the silicon nitride layer. A shallow trench is then created by photolithography and dry etching processes. The photoresist is subsequently removed in which an oxide layer is form in the shallow trench and on polysilicon layer for the purpose of isolation. A selective etching is used to etch the oxide layer. A CMP is performed to produce a planarized surface on a silicon wafer.
Inventors
- 👤 Chia-Shiung Tsai
- 👤 Kuei-Ying Lee
- 👤 Hun-Jan Tao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 17:02
CPC Classifications
H; H10; H10P; H10P95/00; H10P95/06; H10P95/062; H10P95/064; H10P95/066; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/014; H10W10/0143; H10W10/10; H10W10/17
Claims Analysis
Total Claims: 21
Claim 1
Independent Claim
146 words
A method of forming a shallow trench isolation on a wafer, said method comprising the following steps of: forming a pad layer on said wafer; forming a silicon nitride layer over said pad layer; forming a hard mask layer over said silicon nitride layer; forming a trench by etching said hard mask layer, said silicon nitride layer, said pad layer and said wafer; forming a trench filling layer for isolation on said hard mask layer and filling into said trench, a first etching rate of said trench filling layer being faster than a second etching rate of said hard mask layer; and selectively etching said trench filling layer, resulting in a residual protruded trench filling layer remaining over said trench to act as a reverse tone structure, wherein said hard mask is used to prevent said silicon nitride layer from being etched during said selectively etching.
Claim 2
Independent Claim
146 words
A method of forming a shallow trench isolation on a wafer, said method comprising the following steps of: forming a pad layer on said wafer; forming a silicon nitride layer over said pad layer; forming a hard mask layer over said silicon nitride layer; forming a trench by etching said hard mask layer, said silicon nitride layer, said pad layer and said wafer; forming a trench filling layer for isolation on said hard mask layer and filling into said trench, a first etching rate of said trench filling layer being faster than a second etching rate of said hard mask layer; and selectively etching said trench filling layer, resulting in a residual protruded trench filling layer remaining over said trench to act as a reverse tone structure, wherein said hard mask is used to prevent said silicon nitride layer from being etched during said selectively etching.
Claim 3
Dependent Claim
35 words
The method of claim 1 further comprising the step of: after the step of said selectively etching, planarizing said trench filling layer by using chemical mechanical polishing to the surface of said silicon nitride layer.
Claim 4
Dependent Claim
24 words
The method of claim 1 further comprising the step of: after the step of forming said trench filling layer, performing a thermal annealing densification.
Claim 5
Dependent Claim
25 words
The method of claim 2 further comprising the step of: after the step of forming said trench filling layer, performing a thermal annealing for densification.
Claim 6
Dependent Claim
57 words
The method of claim 1, wherein the step of forming said shallow trench comprises of: patterning a photoresist on said hard mask layer to define a shallow trench region; and etching said hard mask layer, said silicon nitride layer, said pad layer and said silicon substrate by using said photoresist as a mask; and removing said photoresist.
Claim 7
Dependent Claim
36 words
The method of claim 1, wherein said trench filling layer is selected from the group of consisting of lining oxide layer, PE-oxide (plasma enhance oxide) layer, SACVD-oxide (subatmospheric chemical vapor deposition oxide) layer and ozone-TEOS layer.
Claim 8
Dependent Claim
14 words
The method of claim 6, wherein said hard mask layer is a polysilicon layer.
Claim 9
Dependent Claim
21 words
The method of claim 7, wherein said polysilicon layer is formed to have a thickness of about 500 to 1000 angstroms.
Claim 10
Dependent Claim
23 words
The method of claim 6, wherein said ozone-TEOS layer is formed at a temperature in the range of about 400 to 480° C.
Claim 11
Dependent Claim
17 words
The method of claim 6, wherein the thickness of said lining oxide layer is about 350 angstroms.
Claim 12
Dependent Claim
16 words
The method of claim 6, wherein the thickness of said PE-oxide layer is about 450-500 angstroms.
Claim 13
Dependent Claim
17 words
The method of claim 6, wherein the thickness of said SACVD oxide layer is about 6500 angstroms.
Claim 14
Dependent Claim
12 words
The method of claim 1, wherein said selective etching comprises diluted HF.
Claim 15
Dependent Claim
41 words
The method of claim 1, wherein said silicon nitride layer is formed by a method selected from the group consisting of Low Pressure Chemical Vapor Deposition (LPCVD), Plasma Enhance Chemical Vapor Deposition (PECVD) and High Density Plasma Chemical Vapor Deposition (HDPCVD).
Claim 16
Dependent Claim
28 words
The method of claim 14, wherein the reaction gases of forming said silicon nitride layer comprises SiH 4 , NH 3 , N 2 , N 2 O.
Claim 17
Dependent Claim
30 words
The method of claim 14, wherein the reaction gases of forming said silicon nitride layer comprises SiH 2 Cl 2 , NH 3 , N 2 , N 2 O.
Claim 18
Dependent Claim
18 words
The method of claim 14, wherein the temperature of forming said silicon nitride layer is about 400-800° C.
Claim 19
Dependent Claim
19 words
The method of claim 1, wherein the thickness of said silicon nitride layer is about 500 to 2000 angstroms.
Claim 20
Dependent Claim
24 words
The method of claim 3, wherein said thermal annealing is carried out at a temperature of about 950 to 1050° C., 30 to 130minutes.
Claim 21
Dependent Claim
24 words
The method of claim 4, wherein said thermal annealing is carried out at a temperature of about 950 to 1050° C., 30 to 130minutes.
References Cited (Backward Citations)
US5108946A
Cited
US5077234A
Cited
JPH0831927A
Cited
US5696020A
Cited
US5712185A
Cited
US5786262A
Cited
US5726090A
Cited
US5801082A
Cited
US5911110A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2003-01-17 | 2003-07-19 | 2004-01-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2007-01-17 | 2007-07-19 | 2008-01-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2011-01-17 | 2011-07-19 | 2012-01-18 | $7700.00 | Window Closed / Lapsed |