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US6010928A
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High density transistor component and its manufacturing method
Assignee: United Microelectronics Corp
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Filing: 1998-04-21
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Granted: 2000-01-04
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Expires: 2018-04-21
Abstract
Abstract A high density transistor component and its manufacturing method which includes the steps of forming a pad oxide layer above a silicon substrate, forming a dielectric layer above the pad oxide layer, and growing an epitaxial silicon layer above the pad oxide layer covering the pad oxide layer as well as the dielectric layer. Source/drain regions including the heavily doped source/drain and the lightly doped source/drain are formed in the epitaxial silicon layer, and a gate terminal region composed from an assembly of a gate oxide layer, a gate terminal and two spacers is formed above the epitaxial silicon layer. The channel is located in the spatial location between the dielectric layer, the gate region and the source/drain regions.
Inventors
- 👤 Chen-Chung Hsu
- 👤 Larry Lin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-31 18:34
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D62/00; H10D62/10; H10D62/113; H10D62/115; H10D62/116; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10P90/1912; H10W10/011; H10W10/014; H10W10/17
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
162 words
A method for manufacturing a high density transistor component comprising the steps of: (a) providing a semiconductor substrate; (b) forming a dielectric layer above the substrate; (c) forming an epitaxial silicon layer above and on two sides of the dielectric layer; (d) forming a gate terminal layer above the silicon layer; and (e) forming source/drain regions, on each side of the gate terminal in the silicon layer, the source/drain regions defining a channel region formed in the space between the source/drain regions and underneath the dielectric layer, wherein the dielectric layer in the step (b) is formed by the steps of: forming a pad oxide layer above the silicon substrate; forming a silicon nitride layer above the pad oxide layer; patterning the silicon nitride layer and the pad oxide layer to form isolating trenches; forming isolating oxide layers in the isolating trenches; etching the silicon nitride layer to reduce thickness thereof; and patterning the residual silicon nitride layer and pad oxide layer.
Claim 2
Independent Claim
162 words
A method for manufacturing a high density transistor component comprising the steps of: (a) providing a semiconductor substrate; (b) forming a dielectric layer above the substrate; (c) forming an epitaxial silicon layer above and on two sides of the dielectric layer; (d) forming a gate terminal layer above the silicon layer; and (e) forming source/drain regions, on each side of the gate terminal in the silicon layer, the source/drain regions defining a channel region formed in the space between the source/drain regions and underneath the dielectric layer, wherein the dielectric layer in the step (b) is formed by the steps of: forming a pad oxide layer above the silicon substrate; forming a silicon nitride layer above the pad oxide layer; patterning the silicon nitride layer and the pad oxide layer to form isolating trenches; forming isolating oxide layers in the isolating trenches; etching the silicon nitride layer to reduce thickness thereof; and patterning the residual silicon nitride layer and pad oxide layer.
Claim 3
Dependent Claim
55 words
A method according to claim 1, wherein the method for forming the isolating oxide layer further comprises of the following steps: depositing a silicon dioxide layer in the isolating trenches and above the silicon nitride layer; and using a chemical-mechanical polishing method to polish the silicon dioxide layer until the silicon nitride layer is exposed.
Claim 4
Dependent Claim
18 words
A method according to claim 1, wherein the thickness of the pad oxide layer is about 2000˜4000 Å.
Claim 5
Dependent Claim
19 words
A method according to claim 2, wherein the residual thickness of the silicon nitride layer is about 500˜1000 Å.
Claim 6
Dependent Claim
47 words
A method according to claim 2, wherein step (c) comprises the substeps: growing an epitaxial silicon layer above the semiconductor substrate; and using a chemical-mechanical polishing method to polish the epitaxial silicon layer until it is almost at the same surface level as the silicon dioxide layer.
Claim 7
Dependent Claim
16 words
A method according to claim 1, wherein the source/drain regions have a lightly doped drain structure.
Claim 8
Dependent Claim
26 words
A method according to claim 1, wherein the gate terminal forming step comprises forming a stacked gate oxide layer and a polysilicon layer as an assembly.
Claim 9
Dependent Claim
16 words
A method according to claim 1, wherein the channel length is smaller than about 0.18 μm.
Claim 10
Dependent Claim
154 words
A method according to claim 8, wherein in steps (b) and step (c), comprises of the following substeps: forming sequentially a first pad oxide layer, a first silicon nitride layer, a second pad oxide layer and a second silicon nitride layer above the semiconductor substrate; patterning the first and the second silicon nitride layers and the pad oxide layers to form isolating trenches; forming isolating silicon oxide layers in the isolating trenches; further defining the first and the second silicon nitride layers and the pad oxide layers to form a channel of the desired length; removing the first and the second pad oxide layer along the channel region locations; growing an epitaxial silicon layer above the silicon substrate that also back fills into the space between the first and the second silicon nitride layers; and removing the second silicon nitride layer leaving only the residual first silicon nitride layer behind as the dielectric layer.
Claim 11
Dependent Claim
53 words
A method according to claim 9, wherein the step of forming the isolating oxide layer comprises the following substeps: depositing a silicon dioxide layer into the isolating trenches and above the silicon nitride layer; and using a chemical-mechanical polishing method to polish the silicon dioxide layer until the silicon nitride layer is exposed.
Claim 12
Dependent Claim
40 words
A method according to claim 9, wherein the thickness of the first and the second pad oxide layers are both about 300˜1000 Å, and the thickness of the first and the second silicon nitride layers are both about 1500˜3000 Å.
References Cited (Backward Citations)
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