US6008100A
Expired / Lapsed
US
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Metal-oxide semiconductor field effect transistor device fabrication process
Assignee: United Microelectronics Corp
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Filing: 1998-04-07
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Granted: 1999-12-28
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Expires: 2018-04-07
Abstract
Abstract A method of fabricating a MOS FET is provided. An oxide layer and a polysilicon layer are successively formed on the semiconductor substrate. A pyramidical photoresist layer is used as a mask for forming a hat-shaped gate structure. A first ion implantation process is performed to form an LDD structure.
Inventors
- 👤 Wen-Kuan Yeh
- 👤 Jih-Wen Chou
- 👤 Shih-Wei Sun
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 07:56
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01324; H10D30/00; H10D30/60; H10D30/601; H10D64/20; H10D64/27; H10D64/311; H10D64/411; H10D64/511; H10D64/517; H10D64/518; H10P; H10P30/00; H10P30/20; H10P30/22
Claims Analysis
Total Claims: 26
Claim 1
Independent Claim
96 words
A method of fabricating a metal-oxide-semiconductor field effect transistor (MOS FET), comprising: providing a semiconductor substrate; forming an oxide layer on the semiconductor substrate; forming a polysilicon layer on the oxide layer; forming a photoresist layer on the polysilicon layer; patterning the photoresist layer to form a pyramidical photoresist layer; etching the polysilicon layer and the oxide layer, using the pyramidical photoresist layer as a mask, to form a hat-shaped gate structure; removing the pyramidical photoresist layer; and performing an ion implantation process and an annealing process to form source/drain regions with lightly doped drain structures.
Claim 2
Independent Claim
96 words
A method of fabricating a metal-oxide-semiconductor field effect transistor (MOS FET), comprising: providing a semiconductor substrate; forming an oxide layer on the semiconductor substrate; forming a polysilicon layer on the oxide layer; forming a photoresist layer on the polysilicon layer; patterning the photoresist layer to form a pyramidical photoresist layer; etching the polysilicon layer and the oxide layer, using the pyramidical photoresist layer as a mask, to form a hat-shaped gate structure; removing the pyramidical photoresist layer; and performing an ion implantation process and an annealing process to form source/drain regions with lightly doped drain structures.
Claim 3
Dependent Claim
21 words
A method as claimed in claim 1, wherein the pyramidical photoresist layer is formed by adjusting an angle of incident light.
Claim 4
Dependent Claim
22 words
A method as claimed in claim 2, wherein the pyramidical photoresist layer has a narrower upper portion and a wider lower portion.
Claim 5
Dependent Claim
28 words
A method as claimed in claim 1, wherein the hat-shaped gate structure are formed by etching the polysilicon layer, using a plurality of etchant with different etching rate.
Claim 6
Dependent Claim
23 words
A method as claimed in claim 1, wherein the hat-shaped gate structure are formed by etching the polysilicon layer in different etching conditions.
Claim 7
Dependent Claim
22 words
A method as claimed in claim 4, wherein the hat-shaped gate structure has a narrower upper potion and a wider lower portion.
Claim 8
Dependent Claim
17 words
A method as claimed in claim 1, wherein phosphorous ions are used for the ion implantation process.
Claim 9
Dependent Claim
20 words
A method as claimed in claim 1, wherein an energy for the ion implantation process is about 30 KeV˜100 KeV.
Claim 10
Dependent Claim
26 words
A method as claimed in claim 1, wherein a dosage for the ion implantation process is about 1×10 13 /cm 2 ˜1×10 14 /cm 2 .
Claim 11
Dependent Claim
18 words
A method as claimed in claim 1, wherein a depth of ion implantation is about 0.02 μm˜0.15 μm.
Claim 12
Independent Claim
173 words
A method of fabricating a metal-oxide-semiconductor field effect transistor (MOS FET), comprising: providing a semiconductor substrate; forming an oxide layer on the semiconductor substrate; forming a polysilicon layer on the oxide layer; forming a photoresist layer on the polysilicon layer; patterning the photoresist layer to form a pyramidical photoresist layer; etching the polysilicon layer and the oxide layer, using the pyramidical photoresist layer as a mask, to form a hat-shaped gate structure; removing the pyramidical photoresist layer; performing a first ion implantation process and a first annealing process to form source/drain regions with a first concentration region and a second concentration region wherein a dopant concentration of the first concentration region is lower than a dopant concentration of the second concentration region; forming a spacer around the hat-shaped structure; and performing a second ion implantation process, using the spacer as a mask, and a second annealing process to form a third concentration region wherein the dopant concentration of the second concentration region is lower than a dopant concentration of the third concentration region.
Claim 13
Independent Claim
173 words
A method of fabricating a metal-oxide-semiconductor field effect transistor (MOS FET), comprising: providing a semiconductor substrate; forming an oxide layer on the semiconductor substrate; forming a polysilicon layer on the oxide layer; forming a photoresist layer on the polysilicon layer; patterning the photoresist layer to form a pyramidical photoresist layer; etching the polysilicon layer and the oxide layer, using the pyramidical photoresist layer as a mask, to form a hat-shaped gate structure; removing the pyramidical photoresist layer; performing a first ion implantation process and a first annealing process to form source/drain regions with a first concentration region and a second concentration region wherein a dopant concentration of the first concentration region is lower than a dopant concentration of the second concentration region; forming a spacer around the hat-shaped structure; and performing a second ion implantation process, using the spacer as a mask, and a second annealing process to form a third concentration region wherein the dopant concentration of the second concentration region is lower than a dopant concentration of the third concentration region.
Claim 14
Dependent Claim
21 words
A method as claimed in claim 11, wherein the pyramidical photoresist layer is formed by adjusting an angle of incident light.
Claim 15
Dependent Claim
22 words
A method as claimed in claim 12, wherein the pyramidical photoresist layer has a narrower upper portion and a wider lower portion.
Claim 16
Dependent Claim
28 words
A method as claimed in claim 11, wherein the hat-shaped gate structure are formed by etching the polysilicon layer, using a plurality of etchant with different etching rate.
Claim 17
Dependent Claim
23 words
A method as claimed in claim 11, wherein the hat-shaped gate structure are formed by etching the polysilicon layer in different etching conditions.
Claim 18
Dependent Claim
22 words
A method as claimed in claim 4, wherein the hat-shaped gate structure has a narrower upper potion and a wider lower portion.
Claim 19
Dependent Claim
19 words
A method as claimed in claim 11, wherein phosphorous ions a re used for the first ion implantation process.
Claim 20
Dependent Claim
21 words
A method as claimed in claim 11, wherein an energy for the first ion implantation process is about 30 KeV˜100 KeV.
Claim 21
Dependent Claim
27 words
A method as claimed in claim 11, wherein a dosage for the first ion implantation process is about 1×10 13 /cm 2 ˜1×10 14 /cm 2 .
Claim 22
Dependent Claim
21 words
A method as claimed in claim 11, wherein a depth of the first ion implantation process is about 0.02 μm˜0.15 μm.
Claim 23
Dependent Claim
18 words
A method as claimed in claim 11, wherein phosphorous ions are used for the second ion implantation process.
Claim 24
Dependent Claim
21 words
A method as claimed in claim 11, wherein an energy for the second ion implantation process is about 150 KeV˜500 KeV.
Claim 25
Dependent Claim
27 words
A method as claimed in claim 11, wherein a dosage for the second ion implantation process is about 1×10 13 /cm 2 ˜1×10 14 /cm 2 .
Claim 26
Dependent Claim
21 words
A method as claimed in claim 11, wherein a depth of the second ion implantation process is about 0.2 μm˜0.6 μm.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-12-27 | 2003-06-28 | 2003-12-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-12-27 | 2007-06-28 | 2007-12-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-12-27 | 2011-06-28 | 2011-12-28 | $7700.00 | Window Closed / Lapsed |