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US5998847A Expired / Lapsed US ⏱️ 0.0 years remaining

Low voltage active body semiconductor device

Assignee: GlobalFoundries Inc
•
Filing: 1998-08-11
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Granted: 1999-12-07
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Expires: 2018-08-11
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Abstract

Abstract An active FET body device which comprises an active FET region including a gate, a body region and electrical connection between said gate and said body region that is located within the active FET region is provided along with various methods for fabricating the devices. The electrical connection extends over substantially the entire width of the FET.

Inventors

  • 👤 Fariborz Assaderaghi
  • 👤 Claude L. Bertin
  • 👤 Jeffrey P. Gambino
  • 👤 Louis Lu-Chen Hsu
  • 👤 Jack Allan Mandelman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 13:46
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/05; H10D; H10D30/00; H10D30/60; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/67; H10D30/6704; H10D30/6708; H10D30/6711; H10D86/00; H10D86/01; H10B12/03; H10B12/038; Y; Y10; Y10S; Y10S257/00; Y10S257/90

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 46 words
An active FET body device which comprises an active FET region including a gate; a channel region and electrical connection between said gate and said channel region located within said active FET region, wherein the electrical connection extends over substantially the entire width of the FET.
Claim 2
Dependent Claim 46 words
An active FET body device which comprises an active FET region including a gate; a channel region and electrical connection between said gate and said channel region located within said active FET region, wherein the electrical connection extends over substantially the entire width of the FET.
Claim 3
Dependent Claim 12 words
The active FET body device of claim 1 comprising a SOI substrate.
Claim 4
Dependent Claim 22 words
The device of claim 1 wherein said connection between said gate and said channel region is self-aligned to edges of the gate.
Claim 5
Dependent Claim 16 words
The device of claim 2 being a SOI DRAM array device, logic device or driver device.
Claim 6
Dependent Claim 31 words
The active FET body device of claim 1 wherein a metallic silicide and silicon oxide structure are located on top of said gate to act as a cap for said gate.
Claim 7
Dependent Claim 15 words
The active FET body device according to claim 1 wherein said gate is doped polysilicon.
Claim 8
Dependent Claim 33 words
The active FET body device of claim 1 wherein the length of the electrical connection between the gate and channel region along a surface of the FET is about 200 Å or less.
Claim 9
Dependent Claim 33 words
The active FET body device of claim 1 wherein the length of the electrical connection between the gate and channel region along a surface of the FET is about 100 Å or less.

References Cited (Backward Citations)

JPS6293977A Cited
US5120666A Cited
US5298443A Cited
US5834816A Cited
JPH05343669A Cited
US5852319A Cited
US5714393A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-12-06 2003-06-07 2003-12-07 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-12-06 2007-06-07 2007-12-07 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-12-06 2011-06-07 2011-12-07 $7700.00 Window Closed / Lapsed

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