US5977989A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for synchronizing video and graphics data in a multimedia display system including a shared frame buffer
Assignee: International Business Machines Corp
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Filing: 1997-09-02
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Granted: 1999-11-02
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Expires: 2017-09-02
Abstract
Abstract A multimedia display system includes a central processing unit, a storage device associated with the central processing unit, a standard interface bus to which the central processing unit and the storage device are connected, a graphics processor connected to the bus for generating graphics data in response to commands from the central processor, a digitizer for converting an analog video signal to digital form and for producing synchronization signals, a video processor for processing the digitized video data to produce pixel representations of the digitized video signal, a shared frame buffer for storing the graphics data generated by the graphics processor and the pixel representations of the video signal, a device for converting the stored digital data to a data stream appropriate for driving a video monitor, and a video monitor for displaying the graphics data and the video information, wherein the video processor generates a programmable variable phase vertical synchronization signal for synchronizing video data and graphics data through a shared frame buffer with the capacity to handle relocatable windows.
Inventors
- 👤 William Robert Lee
- 👤 Darryl Jonathan Rumph
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 19:42
CPC Classifications
H; H04; H04N; H04N5/00; H04N5/04; G; G09; G09G; G09G5/00; G09G5/12; G09G2340/00; G09G2340/12; G09G2340/125; H04N5/06; H04N5/067; H04N5/073; H04N9/00; H04N9/64; H04N9/641; Y; Y10; Y10S; Y10S715/00; Y10S715/972
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
137 words
A multimedia display system comprising: a central processing unit; a data storage device; a graphics processor for receiving and processing graphics data stored in the storage device under control of the said central processing unit; a bus for interconnecting the central processing unit, the data storage device and the graphics processor; a video processor for receiving and processing video data and for generating a programmable variable phase vertical synchronization signal; circuitry for applying the programmable variable phase vertical synchronization signal to the graphics processor for synchronizing the frames of the graphics and video data; a frame buffer connected to the video processor and to the graphics processor for receiving and storing a composite data frame from the processors; and, a display monitor responsive to the contents of the frame buffer means for displaying the composite video/graphics data.
Claim 2
Dependent Claim
137 words
A multimedia display system comprising: a central processing unit; a data storage device; a graphics processor for receiving and processing graphics data stored in the storage device under control of the said central processing unit; a bus for interconnecting the central processing unit, the data storage device and the graphics processor; a video processor for receiving and processing video data and for generating a programmable variable phase vertical synchronization signal; circuitry for applying the programmable variable phase vertical synchronization signal to the graphics processor for synchronizing the frames of the graphics and video data; a frame buffer connected to the video processor and to the graphics processor for receiving and storing a composite data frame from the processors; and, a display monitor responsive to the contents of the frame buffer means for displaying the composite video/graphics data.
Claim 3
Dependent Claim
37 words
A multimedia display system as set forth in claim 1 in which the video data are in analog form and the video processor includes a digitizer for converting the received analog video data to digital video data.
Claim 4
Dependent Claim
45 words
A multimedia display system as set forth in claim 1 in which the video processor includes: a counter for counting a predetermined number of horizontal lines representative of a phase delay; and, a sync pulse generation circuit responsive to a predetermined count of the counter.
Claim 5
Independent Claim
85 words
A method of operating a multimedia display system comprising the steps: receiving and processing data signals from first and second data sources; generating a programmable variable phase vertical synchronization signal from the first data source; applying the generated programmable variable phase vertical synchronization signal to synchronize the data signals from the first and second sources; storing the processed and synchronized first and second data signals in a frame buffer means; and, applying the stored contents of the frame buffer to a display monitor for display.
Claim 6
Independent Claim
85 words
A method of operating a multimedia display system comprising the steps: receiving and processing data signals from first and second data sources; generating a programmable variable phase vertical synchronization signal from the first data source; applying the generated programmable variable phase vertical synchronization signal to synchronize the data signals from the first and second sources; storing the processed and synchronized first and second data signals in a frame buffer means; and, applying the stored contents of the frame buffer to a display monitor for display.
Claim 7
Dependent Claim
77 words
A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 4, wherein said generating step further comprises the steps of: storing a count representative of a predetermined phase delay between an input synchronization signal and an output synchronization signal; counting in a counter a number of count signals to said stored count; generating a synchronization signal output when said counter reaches a predetermined count.
Claim 8
Dependent Claim
32 words
A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 5, wherein said counting step counts horizontal synchronization pulses.
Claim 9
Dependent Claim
35 words
A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 5, wherein said input and output synchronization signals are vertical synchronization signals.
Claim 10
Dependent Claim
41 words
A method of synchronizing a plurality of data sources for display on a video monitor in a data processing system, according to claim 5, wherein said count represents a phase delay between said first data source and said second data source.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-11-01 | 2003-05-03 | 2003-11-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-11-01 | 2007-05-03 | 2007-11-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-11-01 | 2011-05-03 | 2011-11-02 | $7700.00 | Window Closed / Lapsed |