High-voltage-resistant MOS transistor, and corresponding manufacturing process

Claim 1

A MOS transistor capable of withstanding relatively high voltages and comprising: a substrate of semiconductor material and including a substrate region having conductivity of a first type, the substrate region comprising a drain region and a source region, and a channel region intermediate between the source and drain regions, both said source and drain regions having conductivity of a second type and extending from a first surface of the substrate, said source and drain regions each including a heavily doped region that forms an active region; and a gate comprising at least a first polysilicon layer overlying the first surface of at least above said channel region and a gate oxide layer positioned between said at least a first polysilicon layer and said channel region for capacitively coupling therebetween; said at least a first polysilicon layer comprising a mid-portion having opposing sides which only overlies said channel region and which has a first total conductivity of the first type, and a peripheral portion positioned on each of the opposing sides of said mid-portion, and having a conductivity differentiated from the conductivity in the mid-portion, said peripheral portion at least partly overlying said source and drain regions toward said channel region, wherein said source and drain regions each include an extension formed under said corresponding peripheral portions, wherein said extensions are more lightly doped than the heavily doped regions that form the active regions of said source and drain regions, said extensions extending under the outer side of each respective corresponding peripheral portion, and shallow regions formed by dopant diffusion from corresponding peripheral portions that extend from each of said extensions and extend substantially under said corresponding peripheral portions to said mid-portion, wherein said shallow regions have a depth less than said extensions and of different doping concentration, wherein said peripheral portions each comprise at least a concentration of impurities of the second conductivity type.