US5970376A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Post via etch plasma treatment method for forming with attenuated lateral etching a residue free via through a silsesquioxane spin-on-glass (SOG) dielectric layer
Assignee: Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Filing: 1997-12-29
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Granted: 1999-10-19
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Expires: 2017-12-29
Abstract
Abstract A method for forming a via through a dielectric layer within a microelectronics fabrication. There is first provided a substrate employed within a microelectronics fabrication. There is then formed over the substrate a low dielectric constant dielectric layer, where the low dielectric constant dielectric layer is formed from a silsesquioxane spin-on-glass (SOG) dielectric material. There is then formed over the low dielectric constant dielectric layer a patterned photoresist layer. There is then etched through use of a fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the low dielectric constant dielectric layer to form a patterned low dielectric constant dielectric layer having a via formed therethrough. The fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via. There is then treated through use of a plasma treatment method the fluorocarbon polymer residue layer to form a plasma treated fluorocarbon polymer residue layer. The plasma treated fluorocarbon polymer residue layer is susceptible, in comparison with the fluorocarbon polymer residue layer, to being stripped from the sidewall of the via through an oxygen containing plasma stripping method employed in stripping from the microelectronics fabrication the patterned photoresist layer with attenuated lateral etching of the patterned low dielectric constant dielectric layer. Finally, there is then stripping through use of the oxygen containing plasma stripping method the patterned photoresist layer from over patterned low dielectric constant dielectric layer and the plasma treated fluorocarbon polymer residue layer from upon the sidewall of the via.
Inventors
- 👤 Chao-Cheng Chen
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 18:08
CPC Classifications
H; H10; H10P; H10P70/00; H10P70/20; H10P70/23; H10P70/234; H10P50/00; H10P50/20; H10P50/28; H10P50/282; H10P50/283; H10P50/286; H10P50/287; Y; Y10; Y10S; Y10S438/00; Y10S438/963
Claims Analysis
Total Claims: 15
Claim 1
Independent Claim
224 words
A method for forming a via through a dielectric layer within a microelectronics fabrication comprising: providing a substrate employed within a microelectronics fabrication; forming over the substrate a dielectric layer, the dielectric layer being formed from a silsesquioxane spin-on-glass (SOG) dielectric material; forming over the dielectric layer a patterned photoresist layer; etching through use of a fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the dielectric layer to form a patterned dielectric layer having a via formed therethrough, the fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via; treating through use of a plasma treatment method the fluorocarbon polymer residue layer to form a plasma treated fluorocarbon polymer residue layer, the plasma treated fluorocarbon polymer residue layer being susceptible, in comparison with the fluorocarbon polymer residue layer, to being stripped from the sidewall of the via through an oxygen containing plasma stripping method employed in stripping from the microelectronics fabrication the patterned photoresist layer with attenuated lateral etching of the patterned dielectric layer; and stripping through use of the oxygen containing plasma stripping method the patterned photoresist layer from over patterned dielectric layer and the plasma treated fluorocarbon polymer residue layer from upon the sidewall of the via.
Claim 2
Independent Claim
224 words
A method for forming a via through a dielectric layer within a microelectronics fabrication comprising: providing a substrate employed within a microelectronics fabrication; forming over the substrate a dielectric layer, the dielectric layer being formed from a silsesquioxane spin-on-glass (SOG) dielectric material; forming over the dielectric layer a patterned photoresist layer; etching through use of a fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the dielectric layer to form a patterned dielectric layer having a via formed therethrough, the fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via; treating through use of a plasma treatment method the fluorocarbon polymer residue layer to form a plasma treated fluorocarbon polymer residue layer, the plasma treated fluorocarbon polymer residue layer being susceptible, in comparison with the fluorocarbon polymer residue layer, to being stripped from the sidewall of the via through an oxygen containing plasma stripping method employed in stripping from the microelectronics fabrication the patterned photoresist layer with attenuated lateral etching of the patterned dielectric layer; and stripping through use of the oxygen containing plasma stripping method the patterned photoresist layer from over patterned dielectric layer and the plasma treated fluorocarbon polymer residue layer from upon the sidewall of the via.
Claim 3
Dependent Claim
37 words
The method of claim 1 wherein the microelectronics fabrication is chosen from the group of microelectronics fabrications consisting of integrated circuit microelectronics fabrications, solar cell microelectronics fabrications, ceramic substrate microelectronics fabrications and flat panel display microelectronics fabrications.
Claim 4
Dependent Claim
50 words
The method of claim 1 wherein the silsesquioxane spin-on-glass (SOG) dielectric material is chosen from the group of silsesquioxane spin-on-glass (SOG) dielectric materials consisting of hydrogen silsesquioxane spin-on-glass (SOG) dielectric materials, carbon bonded organo functional silsesquioxane spin-on-glass (SOG) dielectric materials and carbon bonded fluorocarbon functional silsesquioxane spin-on-glass (SOG) dielectric materials.
Claim 5
Dependent Claim
36 words
The method of claim 1 wherein the fluorine containing plasma etch method employs a fluorine containing etchant gas chosen from the group of fluorine containing etchant gases consisting of perfluorocarbons, hydrofluorocarbons, sulfur hexafluoride and nitrogen trifluoride.
Claim 6
Dependent Claim
30 words
The method of claim 1 wherein the plasma treatment method employs a plasma treatment gas chosen from the group of plasma treatment gases consisting of argon, neon, krypton and xenon.
Claim 7
Dependent Claim
36 words
The method of claim 1 wherein the oxygen containing plasma stripping method employs an oxygen containing stripping gas chosen from the group of oxygen containing stripping gases consisting of oxygen, ozone, nitrous oxide and nitric oxide.
Claim 8
Dependent Claim
12 words
A microelectronics fabrication fabricated in accord with the method of claim 1.
Claim 9
Independent Claim
241 words
A method for forming a via through a dielectric layer within an integrated circuit microelectronics fabrication comprising: providing a semiconductor substrate employed within an integrated circuit microelectronics fabrication, the semiconductor substrate having a field effect transistor (FET) formed thereupon; forming over the semiconductor substrate a dielectric layer, the dielectric layer being formed from a silsesquioxane spin-on-glass (SOG) dielectric material; forming over the dielectric layer a patterned photoresist layer; etching through use of a fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the dielectric layer to form a patterned dielectric layer having a via formed therethrough, the fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via; treating through use of a plasma treatment method the fluorocarbon polymer residue layer to form a plasma treated fluorocarbon polymer residue layer, the plasma treated fluorocarbon polymer residue layer being susceptible, in comparison with the fluorocarbon polymer residue layer, to being stripped from the sidewall of the via through an oxygen containing plasma stripping method employed in stripping from the microelectronics fabrication the patterned photoresist layer with attenuated lateral etching of the patterned dielectric layer; and stripping through use of the oxygen containing plasma stripping method the patterned photoresist layer from over patterned dielectric layer and the plasma treated fluorocarbon polymer residue layer from upon the sidewall of the via.
Claim 10
Independent Claim
241 words
A method for forming a via through a dielectric layer within an integrated circuit microelectronics fabrication comprising: providing a semiconductor substrate employed within an integrated circuit microelectronics fabrication, the semiconductor substrate having a field effect transistor (FET) formed thereupon; forming over the semiconductor substrate a dielectric layer, the dielectric layer being formed from a silsesquioxane spin-on-glass (SOG) dielectric material; forming over the dielectric layer a patterned photoresist layer; etching through use of a fluorine containing plasma etch method while employing the patterned photoresist layer as a photoresist etch mask layer the dielectric layer to form a patterned dielectric layer having a via formed therethrough, the fluorine containing plasma etch method employing a fluorine containing etchant gas composition which simultaneously forms a fluorocarbon polymer residue layer upon a sidewall of the via; treating through use of a plasma treatment method the fluorocarbon polymer residue layer to form a plasma treated fluorocarbon polymer residue layer, the plasma treated fluorocarbon polymer residue layer being susceptible, in comparison with the fluorocarbon polymer residue layer, to being stripped from the sidewall of the via through an oxygen containing plasma stripping method employed in stripping from the microelectronics fabrication the patterned photoresist layer with attenuated lateral etching of the patterned dielectric layer; and stripping through use of the oxygen containing plasma stripping method the patterned photoresist layer from over patterned dielectric layer and the plasma treated fluorocarbon polymer residue layer from upon the sidewall of the via.
Claim 11
Dependent Claim
50 words
The method of claim 8 wherein the silsesquioxane spin-on-glass (SOG) dielectric material is chosen from the group of silsesquioxane spin-on-glass (SOG) dielectric materials consisting of hydrogen silsesquioxane spin-on-glass (SOG) dielectric materials, carbon bonded organo functional silsesquioxane spin-on-glass (SOG) dielectric materials and carbon bonded fluorocarbon functional silsesquioxane spin-on-glass (SOG) dielectric materials.
Claim 12
Dependent Claim
36 words
The method of claim 8 wherein the fluorine containing plasma etch method employs a fluorine containing etchant gas chosen from the group of fluorine containing etchant gases consisting of perfluorocarbons, hydrofluorocarbons, sulfur hexafluoride and nitrogen trifluoride.
Claim 13
Dependent Claim
30 words
The method of claim 8 wherein the plasma treatment method employs a plasma treatment gas chosen from the group of plasma treatment gases consisting of argon, neon, krypton and xenon.
Claim 14
Dependent Claim
36 words
The method of claim 8 wherein the oxygen containing plasma stripping method employs an oxygen containing stripping gas chosen from the group of oxygen containing stripping gases consisting of oxygen, ozone, nitrous oxide and nitric oxide.
Claim 15
Dependent Claim
12 words
A microelectronics fabrication fabricated in accord with the method of claim 8.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-10-18 | 2003-04-19 | 2003-10-19 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-18 | 2007-04-19 | 2007-10-19 | $3760.00 | Window Closed / Lapsed |
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