US5967795A — SiC semiconductor device comprising a pn junction…

Claim 1

Independent Claim 135 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: forming, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least two doped layers, of a second conducting type arranged on each other; successively increasing the doping concentration of each successive second conducting type layer; and forming the second conducting type layers with successively reduced areas, thus establishing a termination (T) of the layers of the second conducting type having decreasing total charge or decreasing charge density per unit area towards the edge.

Claim 2

Independent Claim 135 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: forming, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least two doped layers, of a second conducting type arranged on each other; successively increasing the doping concentration of each successive second conducting type layer; and forming the second conducting type layers with successively reduced areas, thus establishing a termination (T) of the layers of the second conducting type having decreasing total charge or decreasing charge density per unit area towards the edge.

Claim 3

Dependent Claim 22 words

A method according to claim 1, wherein the layers of the second conducting type are grown epitaxially on top of each other.

Claim 4

Dependent Claim 34 words

A method according to claim 2, wherein the layers of the second conducting type by means of masking are etched down in steps, so that the successive layers are formed with successively reduced areas.

Claim 5

Dependent Claim 42 words

A method according to claim 1, wherein the layers of the second conducting type are formed by implantation of ions into at least one first epitaxially grown layer, thereby forming a second layer having a higher doping concentration than the underlying layer.

Claim 6

Dependent Claim 48 words

A method according to claim 4, wherein the at least one epitaxially grown layer of the second conducting type lying below the implanted layer is etched down in steps by means of masking, and the successive layers of the second conducting type are provided with successively reduced areas.

Claim 7

Independent Claim 154 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least a first lower doped layer of a second conducting type; epitaxially growing onto said first layer a second higher doped layer of the second conducting type; forming said first layer outside the outer border of said second layer by stepwise masking and etching to have stepwise reduced thickness (d 0 -d 4 ) towards the periphery of said first layer, thus establishing a termination (T) of the layers of the second conducting type having decreasing total charge towards the edge.

Claim 8

Independent Claim 154 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least a first lower doped layer of a second conducting type; epitaxially growing onto said first layer a second higher doped layer of the second conducting type; forming said first layer outside the outer border of said second layer by stepwise masking and etching to have stepwise reduced thickness (d 0 -d 4 ) towards the periphery of said first layer, thus establishing a termination (T) of the layers of the second conducting type having decreasing total charge towards the edge.

Claim 9

Dependent Claim 34 words

A method according to claim 6, wherein the relative thicknesses of steps of a four-step first layer of the second conducting type is d 0 :d 1 :d 2 :d 3 :d 4 =100:60:45-50:30-35:20.

Claim 10

Independent Claim 198 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least a first lower doped layer of a second conducting type; epitaxially growing on said first layer a second higher doped layer of the second conducting type; stepwise masking and etching the first layer, outside the outer border of the second layer, to have stepwise reduced thickness (Q0, Q1, Q2, Qs) towards the periphery of said first layer; and implanting outside and adjoining the border of said first layer of the second conducting type, at least one first layer surrounding zone (Q3, Q4, Q6, Q7) with decreasing total charge towards the edge, with ions of the second conducting type on top of the wafer (S), thus establishing a termination (T) of the layers of the second conducting type having decreasing total charge towards the edge.

Claim 11

Independent Claim 198 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least a first lower doped layer of a second conducting type; epitaxially growing on said first layer a second higher doped layer of the second conducting type; stepwise masking and etching the first layer, outside the outer border of the second layer, to have stepwise reduced thickness (Q0, Q1, Q2, Qs) towards the periphery of said first layer; and implanting outside and adjoining the border of said first layer of the second conducting type, at least one first layer surrounding zone (Q3, Q4, Q6, Q7) with decreasing total charge towards the edge, with ions of the second conducting type on top of the wafer (S), thus establishing a termination (T) of the layers of the second conducting type having decreasing total charge towards the edge.

Claim 12

Dependent Claim 33 words

A method according to claim 8, wherein the relation between charges of a four-step reduced charge at the termination (T) comprising layers (10, Q3, Q4) of the second conducting type is Q0:Q1:Q2 Q3:Q4=100:60:45-50:30-35:20.

Claim 13

Dependent Claim 16 words

A method according to claim 8, wherein the implantation is performed with boron or aluminum ions.

Claim 14

Independent Claim 144 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layers of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, a first high doped layer of a second conducting type; forming a junction edge by etching said first layer and said doped layer of the first conducting type to a mesa structure; and growing laterally an edge layer, at the edge of the junction, with stepwise or continuously outwardly decreasing doping concentration, thereby forming a termination (T) of the layer of the second conducting type with decreasing total charge towards the edge.

Claim 15

Independent Claim 144 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layers of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, a first high doped layer of a second conducting type; forming a junction edge by etching said first layer and said doped layer of the first conducting type to a mesa structure; and growing laterally an edge layer, at the edge of the junction, with stepwise or continuously outwardly decreasing doping concentration, thereby forming a termination (T) of the layer of the second conducting type with decreasing total charge towards the edge.

Claim 16

Dependent Claim 16 words

A method according to claim 11, wherein the edge layer is grown by intermediate etch-back operations.

Claim 17

Dependent Claim 40 words

A method according to claim 11, wherein the reduction of the doping concentration of the edge termination (T) is achieved by continuous or stepwise reduction of the dose of a doping gas during the epitaxial growth of the edge layer.

Claim 18

Dependent Claim 27 words

A method according to claim 11, wherein a layer of AlN is epitaxially formed on the mesa structure before growing an edge layer on said AlN layer.

Claim 19

Independent Claim 169 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least a first lower doped layer of a second conducting type; epitaxially growing on said first layer a second higher doped layer of the second conducting type; masking and etching in steps the first layer, outside the outer border of the second layer to form stepwise reduced thickness towards the periphery of said first layer; and creating outside said steps at least one zone of a material with the lowest total charge by vertical epitaxial growth, thereby establishing a termination (T) of the layers of the second conducting type having decreasing total charge towards the edge.

Claim 20

Independent Claim 169 words

A method of manufacturing a semiconductor component comprising a pn junction, in which both a p-type conducting and an n-type conducting layer of the pn junction are doped layers of silicon carbide (SiC), the edge of at least one of the layers being provided with an edge termination (T), said method comprising the steps of: epitaxially growing, on a silicon carbide wafer (S) comprising a doped layer of a first conducting type, at least a first lower doped layer of a second conducting type; epitaxially growing on said first layer a second higher doped layer of the second conducting type; masking and etching in steps the first layer, outside the outer border of the second layer to form stepwise reduced thickness towards the periphery of said first layer; and creating outside said steps at least one zone of a material with the lowest total charge by vertical epitaxial growth, thereby establishing a termination (T) of the layers of the second conducting type having decreasing total charge towards the edge.

Claim 21

Dependent Claim 30 words

A method according to claim 6, wherein the relative thicknesses of steps of a two-step first layer of the second conducting type is d 0 :d 1 :d 2 =100:60:30-35.

Claim 22

Dependent Claim 28 words

A method according to claim 6, wherein the relative thicknesses of steps of a one-step first layer of the second conducting type is d 0 :d 1 =100:50-60.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2002-10-18	2003-04-19	2003-10-19	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2006-10-18	2007-04-19	2007-10-19	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2010-10-18	2011-04-19	2011-10-19	$7700.00	Window Closed / Lapsed

SiC semiconductor device comprising a pn junction with a voltage absorbing edge

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