US5963785A
Expired / Lapsed
US
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Dielectrically-isolated integrated circuit
Assignee: Toshiba Corp
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Filing: 1997-02-28
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Granted: 1999-10-05
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Expires: 2017-02-28
Abstract
Abstract In a semiconductor integrated circuit consisting of a plurality of semiconductor chips each having a plurality of islands, two or more bonding wires each having different potential are connected to bonding pads formed on the surface of semiconductor chips. The islands are isolated by a dielectric isolation region comprising polysilicon film and isolation film formed in an isolation groove. The polysilicon film is exposed at a dicing line region around the semiconductor chip and a surface of the polysilicon film is made highly resistive. If two or more bonding wires come into contact with the polysilicon film exposed at a peripheral region of the semiconductor chip to cause short circuit, parasitic conductance does not occur between two or more bonding wires because the peripheral region of the semiconductor chip has high resistivity, whereby variation in characteristics of the semiconductor integrated circuit can be suppressed.
Inventors
- 👤 Toshimitu Katoh
- 👤 Yoshiaki Aizawa
- 👤 Hisaya Okumura
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 12:38
CPC Classifications
H; H10; H10D; H10D86/00; H10D86/01; H10D86/201; H10P; H10P90/00; H10P90/19; H10P90/1904; H10P90/1906; H10W; H10W10/00; H10W10/01; H10W10/061; H10W10/10; H10W10/181; H10P90/1908; H10P90/1914; H10W10/041; H10W10/40; H10W72/00; H10W72/50; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W90/00; H10W90/701; H10W90/751; H10W90/753
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
152 words
A switching apparatus, comprising: at least two bonding wires; gate, source and drain electrodes; and an impedance element connected between the gate and the source electrodes: the switching apparatus including an integrated circuit having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in a semiconductor chip and a polysilicon film formed on the isolation film to bury the isolation groove, and an active region, electrically connected to said source and drain electrodes, surrounded by the dielectric isolation region, wherein a top surface of the polysilicon film positioned at an outer edge portion of the semiconductor chip is formed to have a resistivity so that an equivalent impedance between any two of the at least two bonding wires when the any two bonding wires contact the top surface of the polysilicon film is larger than a value of the impedance element.
Claim 2
Dependent Claim
152 words
A switching apparatus, comprising: at least two bonding wires; gate, source and drain electrodes; and an impedance element connected between the gate and the source electrodes: the switching apparatus including an integrated circuit having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in a semiconductor chip and a polysilicon film formed on the isolation film to bury the isolation groove, and an active region, electrically connected to said source and drain electrodes, surrounded by the dielectric isolation region, wherein a top surface of the polysilicon film positioned at an outer edge portion of the semiconductor chip is formed to have a resistivity so that an equivalent impedance between any two of the at least two bonding wires when the any two bonding wires contact the top surface of the polysilicon film is larger than a value of the impedance element.
Claim 3
Dependent Claim
18 words
The switching apparatus of claim 1, wherein the surface of the polysilicon film is formed of undoped polysilicon.
Claim 4
Dependent Claim
72 words
An integrated circuit having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in a semiconductor chip and a polysilicon film formed on the isolation film to bury the isolation groove, wherein a top surface of the polysilicon film positioned at an outer edge portion of the semiconductor chip is formed to have sheet resistivity of more than 1 M Ω/□.
Claim 5
Dependent Claim
72 words
An integrated circuit having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in a semiconductor chip and a polysilicon film formed on the isolation film to bury the isolation groove, wherein a top surface of the polysilicon film positioned at an outer edge portion of the semiconductor chip is formed to have sheet resistivity of more than 1 M Ω/□.
Claim 6
Dependent Claim
63 words
The integrated circuit of claim 3 further comprising: a first bonding pad and a second bonding pad; a first bonding wire, a secondary side of which is bonded to the first bonding pad; and a second bonding wire, a secondary side of which is bonded to the second bonding pad, the second bonding wire having a different potential from the first bonding wire.
Claim 7
Dependent Claim
32 words
The integrated circuit of claim 4, wherein the first bonding wire and the second bonding wire are connected to the first bonding pad and the second bonding pad by wedge bonding respectively.
Claim 8
Dependent Claim
32 words
The integrated circuit of claim 4, wherein the first bonding wire and the second bonding wire are connected to the first bonding pad and the second bonding pad by stitch bonding respectively.
Claim 9
Dependent Claim
162 words
A switching apparatus, comprising: at least two bonding wires; gate, source and drain electrodes; and an impedance element connected between the gate and the source electrodes; the switching apparatus including an integrated circuit comprising a first semiconductor chip and a second semiconductor chip, each chip having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in each chip and a polysilicon film formed on the isolation film to bury the isolation groove, and an active region, electrically connected to said source and drain electrodes, wherein a top surface of the polysilicon film positioned at outer edge portions of each of the first and the second semiconductor chips is formed to have a resistivity so that an equivalent impedance between any two of the at least two bonding wires when the any two bonding wires contact the top surface of the polysilicon film is larger than a value of the impedance element.
Claim 10
Dependent Claim
162 words
A switching apparatus, comprising: at least two bonding wires; gate, source and drain electrodes; and an impedance element connected between the gate and the source electrodes; the switching apparatus including an integrated circuit comprising a first semiconductor chip and a second semiconductor chip, each chip having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in each chip and a polysilicon film formed on the isolation film to bury the isolation groove, and an active region, electrically connected to said source and drain electrodes, wherein a top surface of the polysilicon film positioned at outer edge portions of each of the first and the second semiconductor chips is formed to have a resistivity so that an equivalent impedance between any two of the at least two bonding wires when the any two bonding wires contact the top surface of the polysilicon film is larger than a value of the impedance element.
Claim 11
Dependent Claim
18 words
The switching apparatus of claim 7, wherein the surface of the polysilicon films are formed of undoped polysilicon.
Claim 12
Dependent Claim
86 words
An integrated circuit comprising a first semiconductor chip and a second semiconductor chip, each chip having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in each chip and a polysilicon film formed on the isolation film to bury the isolation groove; wherein a top surface of the polysilicon film positioned at an outer edge portion of each of the semiconductor chips is formed to have a sheet resistivity of more than 1 M Ω/□.
Claim 13
Dependent Claim
86 words
An integrated circuit comprising a first semiconductor chip and a second semiconductor chip, each chip having a dielectric isolation region consisting essentially of an isolation film formed on an inner wall of an isolation groove disposed in each chip and a polysilicon film formed on the isolation film to bury the isolation groove; wherein a top surface of the polysilicon film positioned at an outer edge portion of each of the semiconductor chips is formed to have a sheet resistivity of more than 1 M Ω/□.
Claim 14
Dependent Claim
21 words
The switching apparatus of claim 7, wherein the first and the second semiconductor chips are mounted on a common substrate, respectively.
Claim 15
Dependent Claim
79 words
The integrated circuit of claim 9, wherein the first semiconductor chip has a first bonding pad and a second bonding pad, the second semiconductor chip has a third bonding pad and a fourth bonding pad, the first and the third bonding pads are connected to each other by a first bonding wire, and the second and the fourth bonding pads are connected to each other by a second bonding wire which has different potential to the first bonding wire.
Claim 16
Dependent Claim
28 words
The integrated circuit of claim 11, wherein the first and the second bonding wires are connected to the first and the second bonding pads by wedge bonding respectively.
Claim 17
Dependent Claim
28 words
The integrated circuit of claim 11, wherein the first and the second bonding wires are connected to the first and the second bonding pads by stitch bonding respectively.
Claim 18
Dependent Claim
28 words
The integrated circuit of claim 11, wherein a photodiode array is integrated in the first semiconductor chip, and a switching device is integrated in the second semiconductor chip.
Claim 19
Dependent Claim
14 words
The integrated circuit of claim 12, wherein the switching device is formed of MOSFET.
Claim 20
Dependent Claim
40 words
The integrated circuit of claim 13, wherein the first bonding pad is an anode pad, the second bonding pad is a cathode pad, the third bonding pad is a gate pad, and the fourth bonding bad is a source pad.
Claim 21
Dependent Claim
20 words
The integrated circuit of claim 14, further comprising a light emitting device for irradiating the photodiode array with a light.
Claim 22
Dependent Claim
54 words
The switching apparatus of claim 1, further comprising: a first bonding pad connected to the gate electrode; and a second bonding pad connected to the source electrode, wherein one of the bonding wires is bonded to the first bonding pad and another one of the bonding wires is bonded to the second bonding pad.
Claim 23
Dependent Claim
20 words
The switching apparatus of claim 1, wherein the sheet resistivity of the polysilicon film is more than 1 M Ω/□.
Claim 24
Dependent Claim
27 words
The switching apparatus of claim 7, further comprising a photodiode array formed in an active region surrounded by the dielectric isolation region in the first semiconductor chip.
Claim 25
Dependent Claim
54 words
The switching apparatus of claim 7, further comprising: a first bonding paid connected to the gate electrode; and a second bonding pad connected to the source electrode, wherein one of the bonding wires is bonded to the first bonding pad and another one of the bonding wires is bonded to the second bonding pad.
Claim 26
Dependent Claim
20 words
The switching apparatus of claim 7, wherein the sheet resistivity of the polysilicon film is more than 1 M Ω/□.
Claim 27
Dependent Claim
105 words
A semiconductor chip comprising: a first active region; a second active region; and a dielectric isolation region, wherein the dielectric isolation region is disposed between and surrounds said first and second active regions and consists essentially of an isolation film formed on respective outer surfaces of the active regions and a polysilicon film formed on the isolation films to surround the respective active regions; wherein a top surface of the polysilicon film positioned at an outer edge portion of the semiconductor chip is formed to have substantially the same sheet resistivity as that of the polysilicon film disposed between the first and second active regions.
Claim 28
Dependent Claim
105 words
A semiconductor chip comprising: a first active region; a second active region; and a dielectric isolation region, wherein the dielectric isolation region is disposed between and surrounds said first and second active regions and consists essentially of an isolation film formed on respective outer surfaces of the active regions and a polysilicon film formed on the isolation films to surround the respective active regions; wherein a top surface of the polysilicon film positioned at an outer edge portion of the semiconductor chip is formed to have substantially the same sheet resistivity as that of the polysilicon film disposed between the first and second active regions.
References Cited (Backward Citations)
US4364078A
Cited
US5543365A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-10-04 | 2003-04-05 | 2003-10-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-10-04 | 2007-04-05 | 2007-10-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-10-04 | 2011-04-05 | 2011-10-05 | $7700.00 | Window Closed / Lapsed |