US5956843A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multilayer printed wiring board and method of making same
Assignee: International Business Machines Corp
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Filing: 1997-02-04
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Granted: 1999-09-28
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Expires: 2017-02-04
Abstract
Abstract A multilayered printed wiring board includes two or more layers each having a via hole therein, these holes aligned vertically above one another to minimize board real estate while assuring an effective circuit path between respective points on the two layers. One or both via holes can be filled with either an electrically conductive material (e.g., copper paste) or a nonconductive material (e.g., resin).
Inventors
- 👤 Shogo Mizumoto
- 👤 Yutaka Tsukada
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 20:23
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/11; H05K1/111; H05K1/112; H05K1/113; H05K3/00; H05K3/40; H05K3/42; H05K3/421; H05K2201/00; H05K2201/03; H05K2201/0332; H05K2201/0335; H05K2201/0347; H05K2201/09; H05K2201/09209; H05K2201/095; H05K2201/09509; H05K2201/09563; H05K2201/0959; H05K2201/096; H05K2203/00; H05K2203/02; H05K2203/025; H05K3/0094; H05K3/10; H05K3/108; H05K3/4038; H05K3/4053; H05K3/4069; H05K3/423; H05K3/46; H05K3/4644; Y; Y10; Y10S; Y10S428/00; Y10S428/901; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/49128; Y10T29/49155; Y10T29/49156; Y10T29/49165; Y10T29/49167; Y10T428/00; Y10T428/24; Y10T428/24802; Y10T428/24917; Y10T428/24926
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
176 words
A method for fabricating a multilayered printed wiring board comprising the steps of: providing a first insulating layer; forming a first via hole at a predetermined position within said insulating layer; forming a first metal plated layer on said first via hole, said first metal layer having an outer surface external of said first via hole; filling said first via hole with filler material; smoothing said outer surface of said first metal plated layer after said step of filling said first via hole with said filler material; forming a second insulating layer on said first insulating layer and over said first via hole; forming a second via hole in said second insulating layer at a location directly above said first via hole in said first insulating layer and in direct contact therewith; forming a second metal plated layer on said second via hole such that said second metal plated layer is in direct physical contact with said filler material within said first via hole; and forming an electrical circuit pattern from said second metal plated layer.
Claim 2
Independent Claim
176 words
A method for fabricating a multilayered printed wiring board comprising the steps of: providing a first insulating layer; forming a first via hole at a predetermined position within said insulating layer; forming a first metal plated layer on said first via hole, said first metal layer having an outer surface external of said first via hole; filling said first via hole with filler material; smoothing said outer surface of said first metal plated layer after said step of filling said first via hole with said filler material; forming a second insulating layer on said first insulating layer and over said first via hole; forming a second via hole in said second insulating layer at a location directly above said first via hole in said first insulating layer and in direct contact therewith; forming a second metal plated layer on said second via hole such that said second metal plated layer is in direct physical contact with said filler material within said first via hole; and forming an electrical circuit pattern from said second metal plated layer.
Claim 3
Dependent Claim
18 words
The method of claim 1 further including the step of filling said second via hole with filler material.
Claim 4
Dependent Claim
24 words
The method of claim 2 wherein said filling of said second via hole includes filling said second via hole with electrically conductive filler material.
Claim 5
Dependent Claim
24 words
The method of claim 1 wherein said filling of said first via hole includes filling said first via hole with electrically conductive filler material.
References Cited (Backward Citations)
GB1145771A
Cited
US3471631A
Cited
GB2203290A
Cited
US4908940A
Cited
US5108785A
Cited
US5042148A
Cited
JPH0491489A
Cited
US5231751A
Cited
JPH05275857A
Cited
EP0572232A2
Cited
JPH06164152A
Cited
US5323520A
Cited
JPH0738218A
Cited
JPH0779078A
Cited
US5699613A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-09-27 | 2003-03-29 | 2003-09-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-09-27 | 2007-03-29 | 2007-09-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-09-27 | 2011-03-29 | 2011-09-28 | $7700.00 | Window Closed / Lapsed |