Method and apparatus for improved gray scale control in field emission displays

Claim 2

A process for controlling illumination of a pixel in a field emission display ("FED"), the pixel having a first tip array and a second tip array, the process comprising: from a common voltage input, providing a first voltage to the first tip array; from the common voltage input, providing a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates.

Claim 3

A process as in claim 1 wherein providing a first voltage comprises providing a column voltage to the first tip array.

Claim 4

A process as in claim 2 wherein providing a second voltage comprises applying the column voltage to a voltage divider network.

Claim 5

A field emission display ("FED") comprising: a plurality of pixels, each pixel having at least a first tip array and a second tip array; a column conductor in electrical communication with the first tip array so as to provide a first voltage to the first tip array; a voltage biasing circuit which provides electrical communication between the column conductor and the second tip array and in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates.

Claim 6

A field emission display ("FED") comprising: a plurality of pixels, each pixel having at least a first tip array and a second tip array; a column conductor in electrical communication with the first tip array so as to provide a first voltage to the first tip array; a voltage biasing circuit which provides electrical communication between the column conductor and the second tip array and in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates.

Claim 7

A FED as in claim 4 wherein the voltage biasing circuit comprises a voltage divider circuit which lowers a voltage on the column conductor with respect to a ground voltage level.

Claim 8

A field emission display ("FED") comprising: a plurality of pixels, each pixel having at least a first tip array and a second tip array; a column conductor in electrical communication with the first tip array so as to provide a first voltage to the first tip array; a voltage biasing circuit which provides electrical communication between the column conductor and the second tip array and in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates wherein the voltage biasing network comprises a voltage divider circuit which lowers a voltage on the column conductor with respect to a ground voltage; and wherein the voltage divider network comprises a first resistor which provides electrical connection between the column conductor and the second tip, array, and a second resistor which provides electrical connection between a ground conductor and the second tip array.

Claim 9

A field emission display ("FED") comprising: a plurality of pixels, each pixel having at least a first tip array and a second tip array; a column conductor in electrical communication with the first tip array so as to provide a first voltage to the first tip array; a voltage biasing circuit which provides electrical communication between the column conductor and the second tip array and in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates wherein the voltage biasing network comprises a voltage divider circuit which lowers a voltage on the column conductor with respect to a ground voltage; and wherein the voltage divider network comprises a first resistor which provides electrical connection between the column conductor and the second tip, array, and a second resistor which provides electrical connection between a ground conductor and the second tip array.

Claim 10

A FED as in claim 6 wherein the first resistor is a lateral resistor.

Claim 11

A FED as in claim 6 wherein the second resistor is a lateral resistor.

Claim 12

A field emission display comprising: a ground electrode; a column electrode; a plurality of pixels, each pixel having a first tip array and at least a second tip array, the first tip array being formed on a first resistive layer, the first resistive layer having a first column electrode connector and a first ground electrode connector, the second tip array being formed on, a second resistive layer, the second resistive layer being connected to a voltage biasing circuit which is in electrical communication with the ground electrode and the column electrode in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first, and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates.

Claim 13

A field emission display comprising: a ground electrode; a column electrode; a plurality of pixels, each pixel having a first tip array and at least a second tip array, the first tip array being formed on a first resistive layer, the first resistive layer having a first column electrode connector and a first ground electrode connector, the second tip array being formed on, a second resistive layer, the second resistive layer being connected to a voltage biasing circuit which is in electrical communication with the ground electrode and the column electrode in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first, and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates.

Claim 14

A field emission display as in claim 9 wherein the first column electrode connector is a metal layer.

Claim 15

A field emission display as in claim 9 wherein the first column electrode connector is a polysilicon layer.

Claim 16

A field emission display as in claim 9 wherein the first ground electrode connector is a lateral resistor.

Claim 17

A field emission display as in claim 9 wherein the voltage biasing circuit comprises a voltage divider circuit.

Claim 18

A field emission display comprising: a ground electrode; a column electrode; a plurality of pixels, each pixel having a first tip array and at least a second tip array, the first tip array being formed on a first resistive layer, the first resistive layer having a first column electrode connector and a first ground electrode connector, the second tip array being formed on a second resistive layer, the second resistive layer being connected to a voltage biasing circuit which is in electrical communication with the ground electrode and the column electrode in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates; wherein the voltage biasing circuit comprises a voltage divider circuit; and wherein the voltage divider circuit comprises a first resistive connection between the second resistive layer and the column electrode and a second resistive connection between the second resistive layer and the ground electrode.

Claim 19

A field emission display comprising: a ground electrode; a column electrode; a plurality of pixels, each pixel having a first tip array and at least a second tip array, the first tip array being formed on a first resistive layer, the first resistive layer having a first column electrode connector and a first ground electrode connector, the second tip array being formed on a second resistive layer, the second resistive layer being connected to a voltage biasing circuit which is in electrical communication with the ground electrode and the column electrode in which the biasing circuit provides a second voltage to the second tip array, the second voltage being different than the first voltage such that both the first and second tip arrays may simultaneously emit electrons to illuminate the pixel, but at different rates; wherein the voltage biasing circuit comprises a voltage divider circuit; and wherein the voltage divider circuit comprises a first resistive connection between the second resistive layer and the column electrode and a second resistive connection between the second resistive layer and the ground electrode.

Claim 20

A field emission display as in claim 14 wherein the first resistive connection and the second resistive connection are lateral resistors.

Claim 21

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing rietwork in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitters provide different rates of electrons to illuminate the pixel.

Claim 22

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing rietwork in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitters provide different rates of electrons to illuminate the pixel.

Claim 23

The display circuit of claim 16 wherein the biasing network includes a first subnetwork connecting the voltage input to the first emitter and characterized by a first voltage drop between the voltage input and the first emitter; and a second subnetwork connecting the voltage input to the second emitter and characterized by a second voltage drop between the voltage input and the second emitter; wherein the second voltage drop is substantially smaller than the first voltage drop.

Claim 24

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing network in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitter provides different rates of electrons to illuminate the pixel, wherein the biasing network includes a first subnetwork connecting the voltage input to the first emitter and characterized by a first voltage drop between the voltage input and the first emitter; and a second subnetwork connecting the voltage input to the second emitter and characterized by a second voltage drop between the voltage input and the second emitter; and wherein the second voltage drop is substantially smaller than the first voltage drop wherein the ratio of the first voltage drop and the second voltage drop is greater than 5 to 1.

Claim 25

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing network in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitter provides different rates of electrons to illuminate the pixel, wherein the biasing network includes a first subnetwork connecting the voltage input to the first emitter and characterized by a first voltage drop between the voltage input and the first emitter; and a second subnetwork connecting the voltage input to the second emitter and characterized by a second voltage drop between the voltage input and the second emitter; and wherein the second voltage drop is substantially smaller than the first voltage drop wherein the ratio of the first voltage drop and the second voltage drop is greater than 5 to 1.

Claim 26

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing network in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitters provide different rates of electrons to illuminate the pixel, wherein the biasing network includes a first subnetwork connecting the voltage input to the first emitter and characterized by a first voltage drop between the voltage input and the first emitter; and a second subnetwork connecting the voltage input to the second emitter and characterized by a second voltage drop between the voltage input and the second emitter; wherein the second voltage drop is substantially smaller than the first voltage drops and wherein the first subnetwork produces a substantially linear relationship between a voltage input and emitter current over a voltage range of operation for the first emitter; and wherein the second subnetwork produces a substantially non-linear relationship between a voltage input and emitter current over a voltage range of operation for the second emitter, the non-linear relationship being characterized as a power function relationship.

Claim 27

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing network in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitters provide different rates of electrons to illuminate the pixel, wherein the biasing network includes a first subnetwork connecting the voltage input to the first emitter and characterized by a first voltage drop between the voltage input and the first emitter; and a second subnetwork connecting the voltage input to the second emitter and characterized by a second voltage drop between the voltage input and the second emitter; wherein the second voltage drop is substantially smaller than the first voltage drops and wherein the first subnetwork produces a substantially linear relationship between a voltage input and emitter current over a voltage range of operation for the first emitter; and wherein the second subnetwork produces a substantially non-linear relationship between a voltage input and emitter current over a voltage range of operation for the second emitter, the non-linear relationship being characterized as a power function relationship.

Claim 28

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing network in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitters provide different rates of electrons to illuminate the pixel, wherein the biasing network includes a first subnetwork connecting the voltage input to the first emitter and characterized by a first voltage drop between the voltage input and the first emitter; and a second subnetwork connecting the voltage input to the second emitter and characterized by a second voltage drop between the voltage input and the second emitter; wherein the second voltage drop is substantially smaller than the first voltage drop, and wherein the first and second subnetworks include resistive components only.

Claim 29

A display circuit, comprising a first and a second emitter arranged to provide electrons to illuminate a pixel; a biasing network in electrical communication with the first and second emitters and with a voltage input, the network characterized in that, for a given voltage being applied to the voltage input, the network provides a relatively gradual rise of current through the first emitter and a relatively faster rise of current through the second emitter, such that the first and second emitters provide different rates of electrons to illuminate the pixel, wherein the biasing network includes a first subnetwork connecting the voltage input to the first emitter and characterized by a first voltage drop between the voltage input and the first emitter; and a second subnetwork connecting the voltage input to the second emitter and characterized by a second voltage drop between the voltage input and the second emitter; wherein the second voltage drop is substantially smaller than the first voltage drop, and wherein the first and second subnetworks include resistive components only.