Patent US5952687A successfully refreshed from Google Patents.
US5952687A
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Semiconductor memory device having a trench capacitor with lower electrode inside the trench
Assignee: Toshiba Corp
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Filing: 1997-07-08
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Granted: 1999-09-14
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Expires: 2017-07-08
Abstract
Abstract A semiconductor memory device having a semiconductor substrate, an insulating layer provided on the substrate, and a memory cell. The memory cell has a switching transistor provided on the substrate and a charge storage element in a trench made in the insulating layer. The charge storage element has a bottom electrode, a dielectric layer and a top electrode deposited one on another in the order mentioned.
Inventors
- 👤 Takashi Kawakubo
- 👤 Kazuhiro Eguchi
- 👤 Shuichi Komatsu
- 👤 Kazuhide Abe
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:40
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682; H10B12/30; H10B12/31; H10D1/01; H10D1/041; H10D1/042; H10D1/692; H10D1/694; H10D1/711; H10D1/716; Y; Y10; Y10S; Y10S148/00; Y10S148/014
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
112 words
A semiconductor memory device comprising: a semiconductor substrate; an insulating layer provided on the substrate and having a trench and a contact hole formed in a portion of the insulating layer at a bottom of the trench; and a memory cell having a switching transistor provided on said substrate and a charge storage element provided in the trench, said charge storage element comprising a bottom electrode formed only on an inner surface of the trench, a dielectric layer formed on the bottom electrode and a top electrode formed on the dielectric layer, said bottom electrode being connected to the switching transistor by means of a conductive layer buried in said contact hole.
Claim 2
Dependent Claim
112 words
A semiconductor memory device comprising: a semiconductor substrate; an insulating layer provided on the substrate and having a trench and a contact hole formed in a portion of the insulating layer at a bottom of the trench; and a memory cell having a switching transistor provided on said substrate and a charge storage element provided in the trench, said charge storage element comprising a bottom electrode formed only on an inner surface of the trench, a dielectric layer formed on the bottom electrode and a top electrode formed on the dielectric layer, said bottom electrode being connected to the switching transistor by means of a conductive layer buried in said contact hole.
Claim 3
Dependent Claim
39 words
The semiconductor memory device according to claim 1, wherein said bottom electrodes are made of a material selected from the group consisting of a noble metal, a noble metal oxide, a noble metal alloy, and an electrically conductive oxide.
Claim 4
Dependent Claim
29 words
The semiconductor memory device according to claim 2, wherein said noble metal is one selected from the group consisting of platinum, gold, palladium, rhodium, iridium, ruthenium, osmium, and rhenium.
Claim 5
Dependent Claim
68 words
The semiconductor memory device according to claim 2, wherein said noble metal alloy is an alloy of one noble metal and a metal or a semiconductor, said noble metal being one selected from the group consisting of platinum, gold, palladium, rhodium, iridium, ruthenium, osmium, and rhenium, and said metal or said semiconductor being one selected from the group consisting of W, Ni, Cu, Ru, Sn, Ti and Si.
Claim 6
Dependent Claim
29 words
The semiconductor memory device according to claim 2, wherein said noble metal alloy has resistivity of at most 100 μΩcm or less and Vickers hardness of at least 80.
Claim 7
Dependent Claim
49 words
The semiconductor memory device according to claim 2, wherein said electrically conductive oxide is one selected from the group consisting of (Ba, Sr, Ca)RuO 3 , (Ba, Sr, Ca)MoO 3 , (Sr, Ca, RE)TiO 3 , and (RE)NiO 3 wherein RE is Y or the other rare earth element.
Claim 8
Dependent Claim
29 words
The semiconductor memory device according to claim 2, wherein said electrically conductive oxide is resistivity of at most 100 μΩcm or less and Vickers hardness of at least 80.
Claim 9
Dependent Claim
38 words
The semiconductor memory device according to claim 1, wherein said dielectric layer is made of a material selected from the group consisting of (Ba, Sr, Ca) (Ti, Zr, Hf, Sn)O 3 , and Pb(Zr, Ti, La)O 3 .
Claim 10
Dependent Claim
21 words
The semiconductor memory device according to claim 1, wherein a barrier layer is interposed between said trench and said bottom electrode.
Claim 11
Dependent Claim
33 words
The semiconductor memory device according to claim 9, wherein said barrier layer is made of a material selected from the group consisting of titanium, tantalum, tangsten, titanium nitride, tantalum nitride, and tangsten nitride.
Claim 12
Dependent Claim
24 words
The semiconductor memory device according to claim 1, wherein said charge storage element is partly overlapped with a word line of said switching transistor.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-09-13 | 2003-03-15 | 2003-09-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-09-13 | 2007-03-15 | 2007-09-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-09-13 | 2011-03-15 | 2011-09-14 | $7700.00 | Window Closed / Lapsed |