Magnetoresistive random access memory with shared word and digit lines

Claim 2

A magnetic random access memory unit comprising: a memory element including: a magnetic memory cell having first and second magnetic layers separated by a non-magnetic layer; and a memory cell switch being connected in series to the magnetic memory cell for activating the magnetic memory cell; a bit line being placed on the first magnetic layer and electrically coupled to the first magnetic layer; a digit line being placed adjacent the memory cell, electrically isolated from the memory cell, and perpendicularly placed to the bit lines; a word line being placed in parallel to the digit line and coupled to the memory cell switch for controlling the memory cell switch; and a connecting line for electrically connecting the digit line to the word line.

Claim 3

The magnetic random access memory unit as claimed in claim 1 further including a ground switch for coupling the magnetic memory cell to a common line, wherein the ground switch is turned on for providing a sense current to the magnetic memory cell on a read mode.

Claim 4

The magnetic random access memory unit as claimed in claim 2 wherein the memory cell switch is a transistor having first, second and gate electrodes, the first electrode being coupled to the second magnetic layer, the second electrode being coupled to the ground switch, and the gate electrode being coupled to the word line.

Claim 5

The magnetic random access memory unit as claimed in claim 1 wherein, on a write mode, a bit current and a digit current are provided on the bit line and the digit line, respectively, so that the bit current and the digit current generate magnetic fields, respectively, a combined magnetic field of which determines directions of magnetic vectors in the magnetic memory cell.

Claim 6

The magnetic random access memory unit as claimed in claim 1 wherein the first magnetic layer is magnetically free and the second magnetic layer is magnetically pinned so that information is stored in the first layer as directions of magnetization vectors.

Claim 7

The magnetic random access memory unit as claimed in claim 1 wherein the bit line and the digit line are made of metal, and the word line is made of poly-silicon.

Claim 8

The magnetic random access memory unit as claimed in claim 1 wherein the magnetic memory cell has a tunneling junction between the first and second magnetic layers.

Claim 9

A magnetic random access memory bank comprising: a plurality of memory elements, each memory element including: a magnetic memory cell having first and second magnetic layers separated by a non-magnetic layer; and a memory cell switch being connected in series to the magnetic memory cell for activating the magnetic memory cell; a plurality of bit lines, each bit line being placed on the first magnetic layer and electrically coupled to the first magnetic layer; a digit line being placed adjacent the memory cell, electrically isolated from the memory cell and perpendicularly placed to the bit lines; a word line being placed in parallel to the digit line and coupled to memory cell switches for controlling the memory cell switches; and a plurality of connecting lines for electrically connecting the digit line to the word line at every N memory elements, wherein the N is a predetermined positive integer number.

Claim 10

A magnetic random access memory bank comprising: a plurality of memory elements, each memory element including: a magnetic memory cell having first and second magnetic layers separated by a non-magnetic layer; and a memory cell switch being connected in series to the magnetic memory cell for activating the magnetic memory cell; a plurality of bit lines, each bit line being placed on the first magnetic layer and electrically coupled to the first magnetic layer; a digit line being placed adjacent the memory cell, electrically isolated from the memory cell and perpendicularly placed to the bit lines; a word line being placed in parallel to the digit line and coupled to memory cell switches for controlling the memory cell switches; and a plurality of connecting lines for electrically connecting the digit line to the word line at every N memory elements, wherein the N is a predetermined positive integer number.

Claim 11

The magnetic random access memory bank as claimed in claim 8 further including a ground switch for coupling magnetic memory cells to a common line, wherein the ground switch is turned on for providing a sense current to one of the magnetic memory cells on a read mode.

Claim 12

The magnetic random access memory unit as claimed in claim 8 wherein, on a write mode, a bit current and a digit current are provided on one of the bit lines and the digit line, respectively, so that the bit current and the digit current generate magnetic fields, respectively, a combined magnetic field of which determines directions of magnetic vectors in the magnetic memory cell.

Claim 13

The magnetic random access memory bank as claimed in claim 8 wherein the first magnetic layer is magnetically free and the second magnetic layer is magnetically pinned so that information is stored in the first layer as directions of magnetization vectors.

Claim 14

The magnetic random access memory bank as claimed in claim 8 wherein the bit line and the digit line are made of metal, and the word line is made of poly-silicon.

Claim 15

The magnetic random access memory unit as claimed in claim 8 wherein the magnetic memory cell has a tunneling junction between the first and second magnetic layers.

Claim 16

A magnetic random access memory device comprising: a memory array including a plurality of memory elements arranged in rows and columns, each memory element having: a magnetic memory cell including first and second magnetic layers separated by a non-magnetic layer; and a memory cell switch being connected in series to the magnetic memory cell for activating the magnetic memory cell; a plurality of bit lines, each bit line being placed on first magnetic layers of magnetic memory cells arranged in a column line and electrically coupled to the first magnetic layers; a plurality of sets of digit and word lines, each set of digit and word lines having: a digit line being placed adjacent memory cells arranged in a row line, electrically isolated from the memory cells, and perpendicularly placed to the plurality of bit lines; and a word line being placed in parallel with the digit line and coupled to memory cell switches arranged in the row line for controlling the memory cell switches; a plurality of sets of connecting lines, each set of connecting lines for electrically connecting between the digit line and the word line at every N memory elements in the row line, wherein the N is a predetermined positive integer number; a bit line controller, coupled to the plurality of bit lines, for selecting one of the plurality of bit lines; and a digit line controller, coupled to the plurality of digit lines, for selecting one of the plurality of digit lines.

Claim 17

A magnetic random access memory device comprising: a memory array including a plurality of memory elements arranged in rows and columns, each memory element having: a magnetic memory cell including first and second magnetic layers separated by a non-magnetic layer; and a memory cell switch being connected in series to the magnetic memory cell for activating the magnetic memory cell; a plurality of bit lines, each bit line being placed on first magnetic layers of magnetic memory cells arranged in a column line and electrically coupled to the first magnetic layers; a plurality of sets of digit and word lines, each set of digit and word lines having: a digit line being placed adjacent memory cells arranged in a row line, electrically isolated from the memory cells, and perpendicularly placed to the plurality of bit lines; and a word line being placed in parallel with the digit line and coupled to memory cell switches arranged in the row line for controlling the memory cell switches; a plurality of sets of connecting lines, each set of connecting lines for electrically connecting between the digit line and the word line at every N memory elements in the row line, wherein the N is a predetermined positive integer number; a bit line controller, coupled to the plurality of bit lines, for selecting one of the plurality of bit lines; and a digit line controller, coupled to the plurality of digit lines, for selecting one of the plurality of digit lines.

Claim 18

The magnetic random access memory device as claimed in claim 14 wherein memory elements are placed on intersections of bit lines and digit lines.

Claim 19

The magnetic random access memory device as claimed in claim 14 further including at least a ground switch for coupling magnetic memory cells to a common line, wherein the ground switch is turned on for providing a sense current to one of the magnetic memory cells on a read mode.

Claim 20

The magnetic random access memory device as claimed in claim 14 wherein the bit line controller provides a bit current on one of the bit lines and the digit line controller provides a digit current on one of the digit lines, so that the bit current and the digit current generate magnetic fields, respectively, a combined magnetic field of which determines directions of magnetic vectors in the magnetic memory cell.

Claim 21

The magnetic random access memory device as claimed in claim 14 wherein the bit lines and the digit lines are made of metal, and the word lines are made of poly-silicon.

Claim 22

The magnetic random access memory device as claimed in claim 14 wherein the bit line controller includes a current source for providing a current to a bit line selected by the bit line controller.

Claim 23

The magnetic random access memory device as claimed in claim 14 wherein the bit line controller includes: a bit line selector for selecting one of the plurality of bit lines; and a bit current source for providing a bit current into the one of the plurality of bit lines selected by the bit line selector.

Claim 24

The magnetic random access memory device as claimed in claim 20 wherein the bit line controller determines directions of the bit current according to information to be stored in the magnetic memory cell.

Claim 25

The magnetic random access memory device as claimed in claim 14 wherein the digit line controller includes: a digit line selector for selecting one of the plurality of sets of digit and word lines; and a digit current source for providing a digit current into the one of the plurality of sets of digit and word lines selected by the digit line selector.

Claim 26

The magnetic random access memory device as claimed in claim 22 wherein the digit current controller determines directions of the digit current according to information to be stored in the magnetic memory cell.

Claim 27

The magnetic random access memory unit as claimed in claim 14 wherein the magnetic memory cell has a tunneling junction between the first and second magnetic layers.