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US5943547A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of forming highly-integrated thin film capacitor with high dielectric constant layer

Assignee: Renesas Electronics Corp
•
Filing: 1997-09-09
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Granted: 1999-08-24
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Expires: 2017-09-09
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Abstract

Abstract In a capacitor including a silicon substrate and an insulating layer formed on the silicon substrate having a contact hole, a lower electrode layer including a silicon diffusion preventing conductive layer and an oxidation resistance conductive layer, an upper electrode layer, and a high dielectric constant layer therebetween, the silicon diffusion preventing layer is located on or within the contact hole and is isolated from the high dielectric constant layer. The high dielectric constant layer is formed on an upper surface and a side surface of the oxidation resistance conductive layer.

Inventors

  • 👤 Shintaro Yamamichi
  • 👤 Pierre Yves Lesaicherre

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-27 18:26
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/033; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/682

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 132 words
A method for manufacturing a capacitor, comprising the steps of: forming an insulating layer on a silicon substrate; perforating a contact hole in said insulating layer; burying a polycrystalline silicon plug in said contact hole of said insulating layer; forming a silicon diffusion preventing conductive layer on said polycrystalline silicon plug and said insulating layer; forming an oxidation resistance conductive layer on said silicon diffusion preventing conductive layer; etching said oxidation resistance conductive layer and said silicon diffusion preventing conductive layer to form a lower electrode layer; forming a sidewall insulating spacer only on a sidewall of said silicon diffusion preventing conductive layer; forming a high dielectric constant layer on said oxidation resistance conductive layer and said sidewall insulating spacer; and forming an upper electrode layer on said high dielectric constant layer.
Claim 2
Independent Claim 132 words
A method for manufacturing a capacitor, comprising the steps of: forming an insulating layer on a silicon substrate; perforating a contact hole in said insulating layer; burying a polycrystalline silicon plug in said contact hole of said insulating layer; forming a silicon diffusion preventing conductive layer on said polycrystalline silicon plug and said insulating layer; forming an oxidation resistance conductive layer on said silicon diffusion preventing conductive layer; etching said oxidation resistance conductive layer and said silicon diffusion preventing conductive layer to form a lower electrode layer; forming a sidewall insulating spacer only on a sidewall of said silicon diffusion preventing conductive layer; forming a high dielectric constant layer on said oxidation resistance conductive layer and said sidewall insulating spacer; and forming an upper electrode layer on said high dielectric constant layer.
Claim 3
Dependent Claim 40 words
The method as set forth in claim 1, further comprising a step of forming a silicon contact layer on said polycrystalline silicon plug, after said polycrystalline silicon plug is buried and before said silicon diffusion preventing conductive layer is formed.
Claim 4
Dependent Claim 51 words
The method as set forth in claim 1, further comprising the steps of: forming a refractory metal layer on said polycrystalline silicon plug, after said polycrystalline silicon plug is buried; and performing a thermal annealing operation upon said refractory metal layer in a nitrogen atmosphere to form a silicon contact layer.
Claim 5
Dependent Claim 72 words
The method as set forth in claim 1, wherein said silicon diffusion preventing conductive layer comprises a material selected from the group of titanium, tungsten, tantalum, molybdenum, cobalt, nickel, titanium nitride, tungsten nitride, tantalum nitride, molybdenum nitride, cobalt nitride, nickel nitride, nitrogen including titanium, nitrogen including tungsten, nitrogen including tantalum, nitrogen including molybdenum, nitrogen including cobalt, nitrogen including nickel, titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, cobalt silicide and nickel silicide.
Claim 6
Dependent Claim 50 words
The method as set forth in claim 1, wherein said oxidation resistance conductive layer comprises a material selected from the group of ruthenium, rhenium, osmium, iridium, rhodium, platinum, palladium, ruthenium oxide, rhenium oxide, osmium oxide, iridium oxide, rhodium oxide, ruthenium silicide, rhenium silicide, osmium silicide, iridium silicide and rhodium silicide.
Claim 7
Dependent Claim 33 words
The method as set forth in claim 2, wherein said silicon contact layer comprises a material selected from the group of titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, cobalt silicide, nickel silicide.
Claim 8
Dependent Claim 33 words
The method as set forth in claim 3, wherein said silicon contact layer comprises a material selected from the group of titanium silicide, tungsten silicide, tantalum silicide, molybdenum silicide, cobalt silicide, nickel silicide.
Claim 9
Dependent Claim 101 words
The method as set forth in claim 1, wherein said high dielectric constant layer comprises a material selected from the group of ABO 3 , Bi 2 O 2 (X m-1 Z m O 3m-1 )(m=1,2, . . . 5) and Ta 2 O 5 , where A includes at least one of barium, strontium, lead, calcium, litium and potassium; B includes at least one of zirconium, titanium, tantalum, niobium, magnesium, manganese, iron, zinc and tungsten; X includes at least one of barium, strontium, lead, calcium, potassium and bismuth; and Z includes at least one of titanium, tantalum, niobium and tungsten.

References Cited (Backward Citations)

EP0415751A1 Cited
US5580814A Cited
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US5466964A Cited
JPH06244435A Cited
JPH0794600A Cited
EP0697719A2 Cited
JPH08116032A Cited
JPH08191137A Cited
US5567636A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-08-23 2003-02-22 2003-08-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-08-23 2007-02-22 2007-08-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-08-23 2011-02-22 2011-08-24 $7700.00 Window Closed / Lapsed

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