US5933758A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method for preventing electroplating of copper on an exposed surface at the edge exclusion of a semiconductor wafer
Assignee: NXP USA Inc
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Filing: 1997-05-12
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Granted: 1999-08-03
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Expires: 2017-05-12
Abstract
Abstract A method for forming a copper interconnect (54) begins by depositing a barrier layer (48). An intermediate layer (50) is formed over the barrier layer (48) by exposing the barrier layer (48) to a plasma silane environment. The layer (50) is conductive when deposited so that contact resistance is not affected. The layer (50) is insitu covered with a copper seed layer (52). The layer (52) is not formed in an edge exclusion region (20) thereby exposing a portion (50a) of the layer (50). This portion (50a) will natively oxidize in a room ambient to form a copper electroplating prevention barrier whereby copper will not electroplate in the region (20). Therefore, the region (50a) prevents barrier-to-copper interfaces to avoid delamination of the copper while preserving the edge exclusion region desired for copper electroplating.
Inventors
- 👤 Ajay Jain
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 14:34
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/032; H10W20/042; H10W20/043; H10P; H10P14/00; H10P14/40; H10P14/46; H10P14/47; H10W20/033; H10W20/047; H10W20/048; H10W20/056; H10W20/071; H10W20/081; H10W20/084
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
138 words
A method for making a metal layer on a surface of a substrate, the method comprising the steps of: providing the substrate having an edge surface portion and a central surface portion; forming a metallic layer overlying a surface of the substrate, the metallic layer overlying both the edge surface portion and the central surface portion of the substrate; forming an intermediate layer overlying the metallic layer; depositing a seed layer overlying the intermediate layer wherein the seed layer overlies the central surface portion but does not overly the edge surface portion whereby a portion of the intermediate layer in the edge surface portion is exposed to form an exposed intermediate layer portion; and electroplating a metallic region from the seed layer wherein the exposed intermediate layer portion prevents electroplating within the edge surface portion of the substrate.
Claim 2
Independent Claim
138 words
A method for making a metal layer on a surface of a substrate, the method comprising the steps of: providing the substrate having an edge surface portion and a central surface portion; forming a metallic layer overlying a surface of the substrate, the metallic layer overlying both the edge surface portion and the central surface portion of the substrate; forming an intermediate layer overlying the metallic layer; depositing a seed layer overlying the intermediate layer wherein the seed layer overlies the central surface portion but does not overly the edge surface portion whereby a portion of the intermediate layer in the edge surface portion is exposed to form an exposed intermediate layer portion; and electroplating a metallic region from the seed layer wherein the exposed intermediate layer portion prevents electroplating within the edge surface portion of the substrate.
Claim 3
Dependent Claim
29 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: oxidizing the exposed intermediate layer portion by exposure to an ambient environment containing oxygen.
Claim 4
Dependent Claim
24 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer as a layer of magnesium.
Claim 5
Dependent Claim
24 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer as a layer of silicon.
Claim 6
Dependent Claim
24 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer as a layer of germanium.
Claim 7
Dependent Claim
24 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer as a layer of aluminum.
Claim 8
Dependent Claim
21 words
The method of claim 1 wherein the step of providing the substrate further comprises: providing the substrate as a silicon wafer.
Claim 9
Dependent Claim
24 words
The method of claim 1 wherein the step of forming the metallic layer further comprises: forming the metallic layer as a layer of TiN.
Claim 10
Dependent Claim
24 words
The method of claim 1 wherein the step of electroplating the metallic region further comprises: electroplating copper to form an electrical interconnect comprising copper.
Claim 11
Dependent Claim
25 words
The method of claim 1 wherein the step of electroplating the metallic region further comprises: electroplating copper to form an electrical dual-inlaid interconnect comprising copper.
Claim 12
Dependent Claim
51 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: exposing the metallic layer to a silicon source which is energized by a plasma whereby the intermediate layer is formed as a thin silicon layer which reacts with the metallic layer to form a silicide region.
Claim 13
Dependent Claim
29 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: exposing the metallic layer to a silane gas which is energized by a plasma.
Claim 14
Dependent Claim
32 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer as a layer of material which is less than 20 angstroms in thickness.
Claim 15
Dependent Claim
31 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer as a layer of material which is approximately 6 angstroms in thickness.
Claim 16
Dependent Claim
56 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer via exposure to a silane plasma operating with a substrate temperature of less than 450° C., a chamber pressure of roughly 100 mTorr to 3 Torr, and a silane flow of roughly 1 ccm to 100 ccm.
Claim 17
Dependent Claim
42 words
The method of claim 1 wherein the step of forming the intermediate layer further comprises: forming the intermediate layer insitu with the seed layer without breaking vacuum in order to avoid oxidation of intermediate layer portions which directly underlie the seed layer.
Claim 18
Independent Claim
218 words
A method for making a copper layer on a surface of a semiconductor wafer, the method comprising the steps of: providing the semiconductor wafer having an edge surface portion around a periphery of the semiconductor wafer and a central surface portion near a center of the semiconductor wafer; forming a first metal interconnect layer; forming an inter-level dielectric layer overlying the first metal interconnect layer; forming at least one opening through the inter-level dielectric layer, the at least one opening through the inter-level dielectric layer having a trench portion and a via portion wherein the via portion contacts to the first metal interconnect layer; forming a barrier layer within the at least one opening, the barrier layer comprising titanium; forming a silicon-comprising layer overlying the barrier layer; forming a copper seed layer overlying the silicon-comprising layer wherein the copper seed layer exposes a portion of the silicon-comprising layer which overlies the edge surface portion of the semiconductor wafer; oxidizing the portion of the silicon-comprising layer which overlies the edge surface portion to form an oxide region over the edge surface portion; and exposing the copper seed layer and the oxide region to a copper electroplating environment wherein copper is electroplated onto the copper seed layer while the oxide region substantially prevents copper electroplating within the edge surface portion.
Claim 19
Independent Claim
218 words
A method for making a copper layer on a surface of a semiconductor wafer, the method comprising the steps of: providing the semiconductor wafer having an edge surface portion around a periphery of the semiconductor wafer and a central surface portion near a center of the semiconductor wafer; forming a first metal interconnect layer; forming an inter-level dielectric layer overlying the first metal interconnect layer; forming at least one opening through the inter-level dielectric layer, the at least one opening through the inter-level dielectric layer having a trench portion and a via portion wherein the via portion contacts to the first metal interconnect layer; forming a barrier layer within the at least one opening, the barrier layer comprising titanium; forming a silicon-comprising layer overlying the barrier layer; forming a copper seed layer overlying the silicon-comprising layer wherein the copper seed layer exposes a portion of the silicon-comprising layer which overlies the edge surface portion of the semiconductor wafer; oxidizing the portion of the silicon-comprising layer which overlies the edge surface portion to form an oxide region over the edge surface portion; and exposing the copper seed layer and the oxide region to a copper electroplating environment wherein copper is electroplated onto the copper seed layer while the oxide region substantially prevents copper electroplating within the edge surface portion.
Claim 20
Dependent Claim
33 words
The method of claim 17 wherein the silicon-comprising layer is a silicon layer which is at least partially silicided due to exposure to the barrier layer comprising titanium to form a refractory silicide.
Claim 21
Dependent Claim
29 words
The method of claim 17 wherein the silicon-comprising layer is formed over a surface of the barrier layer via exposure of the barrier layer to a silane plasma environment.
Claim 22
Dependent Claim
35 words
The method of claim 17 wherein the silicon-comprising layer is formed insitu with the copper seed layer without breaking vacuum so that portions of the silicon-comprising layer directly underlying the copper seed layer are unoxidized.
Claim 23
Dependent Claim
18 words
The method of claim 17 wherein the silicon-comprising layer has a thickness between 2 Angstroms and 10 Angstroms.
Claim 24
Dependent Claim
23 words
The method of claim 17 wherein the silicon-comprising layer is formed by a silane plasma at a temperature of less than 450° C.
Claim 25
Dependent Claim
11 words
The method of claim 17 wherein the barrier layer comprises TiN.
Claim 26
Independent Claim
155 words
A method for making a conductive layer comprising copper on a surface of a semiconductor wafer, the method comprising the steps of: depositing a barrier region overlying the semiconductor wafer; placing the semiconductor wafer containing the barrier region into a vacuum environment; exposing the barrier region to a silane plasma in the vacuum environment to form a thin silicon-comprising layer on a surface of the barrier region; without breaking the vacuum environment, forming a copper seed layer over the thin silicon-comprising layer, the copper seed layer forming covered portions of the thin silicon-comprising layer and uncovered portions of the thin silicon-comprising layer; removing the semiconductor wafer from the vacuum environment whereby the uncovered portions of the thin silicon-comprising layer oxidize to form an oxide region and the covered portions of the thin silicon-comprising layer are protected from oxidation; and electroplating copper from the copper seed layer whereby the oxide region does not substantially electroplate copper.
Claim 27
Independent Claim
155 words
A method for making a conductive layer comprising copper on a surface of a semiconductor wafer, the method comprising the steps of: depositing a barrier region overlying the semiconductor wafer; placing the semiconductor wafer containing the barrier region into a vacuum environment; exposing the barrier region to a silane plasma in the vacuum environment to form a thin silicon-comprising layer on a surface of the barrier region; without breaking the vacuum environment, forming a copper seed layer over the thin silicon-comprising layer, the copper seed layer forming covered portions of the thin silicon-comprising layer and uncovered portions of the thin silicon-comprising layer; removing the semiconductor wafer from the vacuum environment whereby the uncovered portions of the thin silicon-comprising layer oxidize to form an oxide region and the covered portions of the thin silicon-comprising layer are protected from oxidation; and electroplating copper from the copper seed layer whereby the oxide region does not substantially electroplate copper.
Claim 28
Dependent Claim
11 words
The method of claim 24 wherein the barrier region comprises TiN.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-08-02 | 2003-02-01 | 2003-08-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-08-02 | 2007-02-01 | 2007-08-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-08-02 | 2011-02-01 | 2011-08-03 | $7700.00 | Window Closed / Lapsed |