Patent US4498493A successfully refreshed from Google Patents.
Patent US3427186A successfully refreshed from Google Patents.
Patent US5920093A successfully refreshed from Google Patents.
US5920093A
Expired / Lapsed
US
⏱️ 0.0 years remaining
SOI FET having gate sub-regions conforming to t-shape
Assignee: NXP USA Inc
•
Filing: 1997-04-07
•
Granted: 1999-07-06
•
Expires: 2017-04-07
Abstract
Abstract A semiconductor device (120) is formed in a silicon-on-insulator (SOI) substrate (135). The semiconductor device (120) has a channel region (126) that is controlled by a gate structure (129). The channel region (126) has a doping profile that is essentially uniform where the channel region (126) is under the gate structure (129). This eliminates the parasitic channel region that is common with conventional field effect transistors (FETs) that are formed in SOI substrates. Consequently, the semiconductor device (120) of the present invention does not suffer from the "kink" problem that is common to conventional FET devices.
Inventors
- 👤 Wen Ling Margaret Huang
- 👤 Ying-Che Tseng
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 15:35
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0321; H10D30/0323; H10D30/60; H10D30/67; H10D30/6704; H10D30/6708; H10D30/6711; H10D30/6729; H10D30/673; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D86/00; H10D86/201
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
214 words
A semiconductor device comprising: a silicon-on-insulator substrate having a surface; a first doped region extending from the surface of the silicon-on-insulator substrate, wherein the first doped region is of a first conductivity type; a second doped region of the first conductivity type extending from the surface of the silicon-on-insulator substrate and the second doped region is separated from the first doped region to provide a channel region, wherein the channel region has a doping concentration of a second conductivity type that is substantially constant across the channel region; a third doped region of the second conductivity type in the silicon-on-insulator substrate, wherein the third doped region extends from the surface of the silicon-on-insulator substrate, is electrically coupled to the channel region, and forms a PN junction with the first doped region and the second doped region; and a gate structure overlying the channel region, wherein the gate structure has a first sub-region, a second sub-region, a third sub-region, and fourth sub-region, the first sub-region overlying the channel region and the second sub-region being between the third sub-region and the fourth sub-region, and wherein the silicon-on-insulator substrate has a doping profile under the second sub-region of the gate structure that is substantially equal to a doping profile under the first sub-region of the gate structure.
Claim 2
Dependent Claim
214 words
A semiconductor device comprising: a silicon-on-insulator substrate having a surface; a first doped region extending from the surface of the silicon-on-insulator substrate, wherein the first doped region is of a first conductivity type; a second doped region of the first conductivity type extending from the surface of the silicon-on-insulator substrate and the second doped region is separated from the first doped region to provide a channel region, wherein the channel region has a doping concentration of a second conductivity type that is substantially constant across the channel region; a third doped region of the second conductivity type in the silicon-on-insulator substrate, wherein the third doped region extends from the surface of the silicon-on-insulator substrate, is electrically coupled to the channel region, and forms a PN junction with the first doped region and the second doped region; and a gate structure overlying the channel region, wherein the gate structure has a first sub-region, a second sub-region, a third sub-region, and fourth sub-region, the first sub-region overlying the channel region and the second sub-region being between the third sub-region and the fourth sub-region, and wherein the silicon-on-insulator substrate has a doping profile under the second sub-region of the gate structure that is substantially equal to a doping profile under the first sub-region of the gate structure.
Claim 3
Dependent Claim
37 words
The semiconductor device of claim 1 wherein the third doped region has a doping concentration, and the doping concentration of the third doped region is greater than or equal to the doping concentration of the channel region.
Claim 4
Dependent Claim
31 words
The semiconductor device of claim 2 wherein the doping concentration of the channel region is less than about 1×10 19 atoms/cm 3 and greater than about 1×10 16 atoms/cm 3 .
Claim 5
Dependent Claim
24 words
The semiconductor device of claim 3 wherein the doping concentration of the third doped region is greater than about 1×10 19 atoms/cm 3 .
Claim 6
Dependent Claim
215 words
A semiconductor device comprising: a semiconductor substrate that has an active area; a gate structure overlying the semiconductor substrate, wherein the gate structure has a first portion, a second portion, a third portion, and a fourth portion, the second portion separating the third portion from the fourth portion; a first doped region in the semiconductor substrate, wherein the first doped region is of a first conductivity type; a second doped region of the first conductivity type in the semiconductor substrate, the second doped region being separated from the first doped region to provide a channel region that has a doping concentration, wherein the first portion of the gate structure is overlying the channel region; a third doped region of a second conductivity type in the semiconductor substrate, wherein the third doped region is electrically coupled to the channel region, the third doped region being separated from the first doped region by the third portion of the gate structure, and the third doped region being separated from the second doped region by the fourth portion of the gate structure; and wherein the active area under the second portion of the gate structure has a doping concentration that is essentially equal to the doping concentration of the channel region under the first portion of the gate structure.
Claim 7
Dependent Claim
215 words
A semiconductor device comprising: a semiconductor substrate that has an active area; a gate structure overlying the semiconductor substrate, wherein the gate structure has a first portion, a second portion, a third portion, and a fourth portion, the second portion separating the third portion from the fourth portion; a first doped region in the semiconductor substrate, wherein the first doped region is of a first conductivity type; a second doped region of the first conductivity type in the semiconductor substrate, the second doped region being separated from the first doped region to provide a channel region that has a doping concentration, wherein the first portion of the gate structure is overlying the channel region; a third doped region of a second conductivity type in the semiconductor substrate, wherein the third doped region is electrically coupled to the channel region, the third doped region being separated from the first doped region by the third portion of the gate structure, and the third doped region being separated from the second doped region by the fourth portion of the gate structure; and wherein the active area under the second portion of the gate structure has a doping concentration that is essentially equal to the doping concentration of the channel region under the first portion of the gate structure.
Claim 8
Dependent Claim
15 words
The semiconductor device of claim 5 wherein the gate structure is in a `T` configuration.
Claim 9
Dependent Claim
15 words
The semiconductor device of claim 5 wherein the gate structure is in an `H` configuration.
Claim 10
Dependent Claim
30 words
The semiconductor device of claim 5 wherein a first voltage potential on the gate structure results in a current flow from the first doped region to the second doped region.
Claim 11
Dependent Claim
25 words
The semiconductor device of claim 8 wherein a second voltage potential on the third doped region results in holes being removed from the channel region.
Claim 12
Dependent Claim
39 words
The semiconductor device of claim 5 wherein the second portion of the gate structure is adjacent to the first portion of the gate structure, the third portion of the gate structure, and the fourth portion of the gate structure.
Claim 13
Dependent Claim
37 words
The semiconductor device of claim 5 wherein the third doped region has a doping concentration and the doping concentration of the third doped region is greater than or equal to the doping concentration of the channel region.
Claim 14
Dependent Claim
34 words
The semiconductor device of claim 5 wherein the third doped region has a doping concentration and the doping concentration of the third doped region is greater than the doping concentration of the channel region.
Claim 15
Dependent Claim
31 words
The semiconductor device of claim 12 wherein the doping concentration of the channel region is less than about 1×10 19 atoms/cm 3 and greater than about 1×10 16 atoms/cm 3 .
Claim 16
Dependent Claim
24 words
The semiconductor device of claim 13 wherein the doping concentration of the third doped region is greater than about 1--10 19 atoms/cm 3 .
Claim 17
Dependent Claim
14 words
The semiconductor device of claim 5 wherein the semiconductor substrate is a silicon-on-insulator substrate.
Claim 18
Dependent Claim
210 words
A semiconductor device comprising: a silicon-on-insulator substrate that has an active area; a gate structure overlying the silicon-on-insulator substrate, wherein the gate structure has a first portion, a second portion, a third portion, and a fourth portion, the second portion separating the third portion from the fourth portion; a first doped region in the silicon-on-insulator substrate, wherein the first doped region is of a first conductivity type; a second doped region of the first conductivity type in the silicon-on-insulator substrate, the second doped region being separated from the first doped region to provide a channel region; a third doped region of a second conductivity type in the silicon-on-insulator substrate, wherein the third doped region is coupled to the channel region, the third doped region being separated from the first doped region by the third portion of the gate structure, and the third-doped region being separated from the second doped region by the fourth portion of the gate structure; and wherein a current flow is provided between the first doped region and the second doped region when a voltage potential is placed on the gate structure and the current flow increases monotonically when the voltage potential is increased such that the semiconductor device changes from a non-conductive to a conductive state.
Claim 19
Dependent Claim
210 words
A semiconductor device comprising: a silicon-on-insulator substrate that has an active area; a gate structure overlying the silicon-on-insulator substrate, wherein the gate structure has a first portion, a second portion, a third portion, and a fourth portion, the second portion separating the third portion from the fourth portion; a first doped region in the silicon-on-insulator substrate, wherein the first doped region is of a first conductivity type; a second doped region of the first conductivity type in the silicon-on-insulator substrate, the second doped region being separated from the first doped region to provide a channel region; a third doped region of a second conductivity type in the silicon-on-insulator substrate, wherein the third doped region is coupled to the channel region, the third doped region being separated from the first doped region by the third portion of the gate structure, and the third-doped region being separated from the second doped region by the fourth portion of the gate structure; and wherein a current flow is provided between the first doped region and the second doped region when a voltage potential is placed on the gate structure and the current flow increases monotonically when the voltage potential is increased such that the semiconductor device changes from a non-conductive to a conductive state.
Claim 20
Dependent Claim
27 words
The semiconductor device of claim 16 wherein the current flow increases absent a kink region when the semiconductor device changes from the non-conductive to the conductive state.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-07-05 | 2003-01-04 | 2003-07-06 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-07-05 | 2007-01-04 | 2007-07-06 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-07-05 | 2011-01-04 | 2011-07-06 | $7700.00 | Window Closed / Lapsed |