Patent US5915168A successfully refreshed from Google Patents.
US5915168A
Expired / Lapsed
US
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Lid wafer bond packaging and micromachining
Assignee: Intersil Corp
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Filing: 1998-05-06
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Granted: 1999-06-22
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Expires: 2018-05-06
Abstract
Abstract A wafer level hermetically packaged integrated circuit has a protective cover wafer bonded to a semiconductor device substrate wafer. The substrate wafer may contain a cavity. The cover wafer seals integrated circuits and other devices including but not limited to air bridge structures, resonant beams, surface acoustic wave (SAW) devices, trimmable resistors, and micromachines. Some devices, such as SAWs, are formed on the surface of cavities formed in the protective cover wafer. Die are separated to complete the process.
Inventors
- 👤 Matthew M. Salatino
- 👤 William R. Young
- 👤 Patrick A. Begley
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 19:42
CPC Classifications
H; H10; H10W; H10W76/00; H10W76/10; H10W76/17; H10W76/18; B; B81; B81C; B81C1/00; B81C1/00015; B81C1/00261; B81C1/00333; B29; B29C; B29C43/00; B29C43/32; B29C43/36; H03; H03H; H03H9/00; H03H9/02; H03H9/05; H03H9/0538; H03H9/0547; H10F; H10F39/00; H10F39/80; H10F39/804; H10W42/00; H10W42/121; H10W42/20; H10W76/60; B29C33/00; B29C33/0022; B81C2203/00; B81C2203/01; B81C2203/0109; B81C2203/0118; B81C2203/0127
Claims Analysis
Total Claims: 33
Claim 1
Independent Claim
115 words
A method for packaging individual die at the wafer level comprising the steps of: forming a plurality of die in a device substrate, each die comprising at least one device selected from the group consisting of a microelectronic structure, a micromachine, a micromachine component; forming an insulating layer on a lid wafer comprising a semiconductor layer; patterning the insulating layer to form a plurality of cavities, each cavity corresponding to one of a different die on the device substrate; bonding the insulating layer to the device substrate to seal at least one of the devices inside one of the cavities and form a bonded structure of dice covered and sealed inside the corresponding lid cavities.
Claim 2
Independent Claim
115 words
A method for packaging individual die at the wafer level comprising the steps of: forming a plurality of die in a device substrate, each die comprising at least one device selected from the group consisting of a microelectronic structure, a micromachine, a micromachine component; forming an insulating layer on a lid wafer comprising a semiconductor layer; patterning the insulating layer to form a plurality of cavities, each cavity corresponding to one of a different die on the device substrate; bonding the insulating layer to the device substrate to seal at least one of the devices inside one of the cavities and form a bonded structure of dice covered and sealed inside the corresponding lid cavities.
Claim 3
Dependent Claim
33 words
The method of claim 1 wherein the devices are microelectronic structures and further comprising the step of separating the covered dice from each other to form a plurality of separate, packaged integrated circuits.
Claim 4
Dependent Claim
17 words
The method of claim 1 further comprising the step of selectively removing the lid wafer semiconductor layer.
Claim 5
Dependent Claim
30 words
The method of claim 1 wherein the devices comprise air bridge structures in the device substrate and forming corresponding cavities in the lid wafer to cover the air bridge structures.
Claim 6
Dependent Claim
20 words
The method of claim 1 wherein the device and lid wafers are silicon and the insulating layer is silicon dioxide.
Claim 7
Dependent Claim
35 words
The method of claim 1 comprising the further step of forming contact openings in the insulating layer and exposing the contact openings when the lid wafer is thinned, and filling the contact opening with metal.
Claim 8
Dependent Claim
34 words
The method of claim 6 comprising the further step of forming a plurality of contact pads electrically coupled to the devices, and forming contact openings in the insulating layer aligned with the contact pads.
Claim 9
Dependent Claim
46 words
The method of claim 1 comprising the further steps of forming a transparent window in a portion of the lid wafer, aligning the transparent window with cavities in the device wafer, bonding the lid and device wafers and thinning the lid to expose the transparent window.
Claim 10
Dependent Claim
16 words
The method of claim 8 wherein the devices comprise laser trimmable resistors in the device substrate.
Claim 11
Dependent Claim
15 words
The method of claim 8 wherein the devices comprise resonant beams extending into the cavity.
Claim 12
Dependent Claim
15 words
The method of claim 8 wherein the devices comprise photodetectors in the device wafer die.
Claim 13
Independent Claim
123 words
A method for packaging individual die at the wafer level comprising the steps of: forming a plurality of die in a device substrate, each die comprising at least one device selected from the group consisting of microelectronic structure, micromachines, and micromachinable components; patterning an insulating lid layer to form a plurality of cover cavities, each cavity corresponding to one of a different die on the device substrate; bonding the insulating lid layer to the device substrate to seal at least one of the devices inside one of the cavities and form a bonded structure of dies covered by corresponding lid cavities; removing a portion of the insulating lid layer to provide each die on the device substrate with an individual sealing insulating cover.
Claim 14
Independent Claim
123 words
A method for packaging individual die at the wafer level comprising the steps of: forming a plurality of die in a device substrate, each die comprising at least one device selected from the group consisting of microelectronic structure, micromachines, and micromachinable components; patterning an insulating lid layer to form a plurality of cover cavities, each cavity corresponding to one of a different die on the device substrate; bonding the insulating lid layer to the device substrate to seal at least one of the devices inside one of the cavities and form a bonded structure of dies covered by corresponding lid cavities; removing a portion of the insulating lid layer to provide each die on the device substrate with an individual sealing insulating cover.
Claim 15
Dependent Claim
49 words
The method of claim 12 further comprising the steps of patterning the device substrate to have a pattern of scribe streets for separating adjacent dies from each other and patterning the insulating lid layer to have a scribe cavity in a pattern corresponding to the device substrate scribe pattern.
Claim 16
Dependent Claim
15 words
The method of claim 13 wherein the insulating lid layer is partially removed by lapping.
Claim 17
Dependent Claim
22 words
The method of claim 12 comprising the further step of forming a pattern of conductors on the surface of the cover cavity.
Claim 18
Dependent Claim
12 words
The method of claim 12 wherein the insulating lid layer comprises glass.
Claim 19
Dependent Claim
12 words
The method of claim 12 wherein the insulating lid layer comprises quartz.
Claim 20
Independent Claim
72 words
A method for packaging individual die at the wafer level comprising: forming one or more devices in a semiconductor device substrate wafer; forming one or more electrical bond pads in the semiconductor substrate wafer, spaced from the devices and electrically connected to the device(s) in the semiconductor substrate wafer; and sealing and covering the device(s) with a protective cover wafer bonded to the semiconductor device substrate wafer without covering the bond pads.
Claim 21
Independent Claim
72 words
A method for packaging individual die at the wafer level comprising: forming one or more devices in a semiconductor device substrate wafer; forming one or more electrical bond pads in the semiconductor substrate wafer, spaced from the devices and electrically connected to the device(s) in the semiconductor substrate wafer; and sealing and covering the device(s) with a protective cover wafer bonded to the semiconductor device substrate wafer without covering the bond pads.
Claim 22
Dependent Claim
26 words
The method of claim 18 comprising the further step of forming a cavity in the semiconductor device substrate wafer for containing a portion of a device.
Claim 23
Dependent Claim
24 words
The method of claim 18 wherein the cover wafer is hermetically bonded to the substrate for hermetically enclosing the devices formed in the substrate.
Claim 24
Dependent Claim
27 words
The method of claim 18 wherein the cover wafer comprises a material selected from the group consisting of silicon, germanium, silicon germanium, gallium arsenide, glass and quartz.
Claim 25
Dependent Claim
20 words
The method of claim 18 wherein the cover wafer comprises a material transparent to a first spectrum of electromagnetic radiation.
Claim 26
Dependent Claim
18 words
The method of claim 22 wherein the cover wafer is opaque to a second spectrum of electromagnetic radiation.
Claim 27
Dependent Claim
14 words
The method of claim 18 wherein the cover wafer comprises a circuit formed therein.
Claim 28
Dependent Claim
14 words
The method of claim 18 wherein the circuit comprises a surface acoustic wave device.
Claim 29
Dependent Claim
32 words
The method of claim 18 wherein the cover wafer comprises silicon and portion of the cover wafer is oxidized to form a region of silicon dioxide that is transparent to visible light.
Claim 30
Dependent Claim
21 words
The method of claim 18 wherein the protective cover wafer is bonded to the semiconductor substrate wafer by a oxide bonding.
Claim 31
Dependent Claim
21 words
The method of claim 18 wherein the protective cover wafer is bonded to the semiconductor substrate wafer by a plastic polymer.
Claim 32
Dependent Claim
11 words
The method of claim 28 wherein the plastic polymer is polymethylmethacrylate.
Claim 33
Dependent Claim
21 words
The method of claim 18 wherein the protective cover wafer is bonded to the semiconductor substrate wafer by metal seal rings.
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| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-06-21 | 2002-12-21 | 2003-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-06-21 | 2006-12-21 | 2007-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-06-21 | 2010-12-21 | 2011-06-22 | $7700.00 | Window Closed / Lapsed |