Patent US5903249A successfully refreshed from Google Patents.
US5903249A
Expired / Lapsed
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Method for driving active matrix display device
Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1995-10-02
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Granted: 1999-05-11
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Expires: 2015-10-02
Abstract
Abstract The object of the invention is to design for reduction of the effects of thin-film transistor OFF current and to improve image quality in an active matrix display device in which polysilicon thin-film transistors are used. Plural serially connected thin-film transistors are provided for one pixel electrode, different signals are imposed on the gate terminals of respective thin-film transistors, and a signal is written into the pixel when all the serially connected thin-film transistors are in an on state. Further, since the thin-film transistors are connected in series, the voltage imposed on the source and drain electrodes when they are all in an off state is divided, and consequently the voltage across the source and drain electrodes of the thin-film transistor that drives the pixel is smaller and the OFF current is reduced.
Inventors
- 👤 Jun Koyama
- 👤 Yuji Kawasaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 07:58
CPC Classifications
G; G09; G09G; G09G3/00; G09G3/20; G09G3/34; G09G3/36; G09G3/3611; G09G3/3648; G09G3/3659; G09G2300/00; G09G2300/08; G09G2300/0809; G09G2300/0814; G09G2320/00; G09G2320/02; G09G2320/0209; G09G2320/0214
Claims Analysis
Total Claims: 6
Claim 1
Independent Claim
131 words
A method for driving an active matrix display device comprising: supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said first transistor, wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON.
Claim 2
Independent Claim
131 words
A method for driving an active matrix display device comprising: supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said first transistor, wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON.
Claim 3
Independent Claim
153 words
A method for driving an active matrix display device comprising: supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said first transistor, wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON, and wherein said n-th pixel further has a transistor connected in parallel with one of said first transistor and said second transistor.
Claim 4
Independent Claim
153 words
A method for driving an active matrix display device comprising: supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said first transistor, wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON, and wherein said n-th pixel further has a transistor connected in parallel with one of said first transistor and said second transistor.
Claim 5
Independent Claim
154 words
A method for driving an active matrix display device comprising: supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said transistor. wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON, and wherein said n-th pixel further has a transistor connected in series with said first transistor and said second transistor and kept ON constantly.
Claim 6
Independent Claim
154 words
A method for driving an active matrix display device comprising: supplying a first signal in a first stage to a gate of a first transistor provided in an n-th pixel through an n-th gate line, said first transistor being connected with a pixel electrode of said n-th pixel at one of a source and drain of said first transistor; and supplying a second signal in a next stage to a gate of a second transistor provided in said n-th pixel through an (n+1)-th gate line, one of a source and drain of said second transistor being connected with another source and drain of said transistor. wherein a data is written into said pixel electrode of said n-th pixel when all of the transistors provided in said n-th pixel are ON, and wherein said n-th pixel further has a transistor connected in series with said first transistor and said second transistor and kept ON constantly.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-05-10 | 2002-11-09 | 2003-05-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-10 | 2006-11-09 | 2007-05-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-10 | 2010-11-09 | 2011-05-11 | $7700.00 | Window Closed / Lapsed |