Patent US5903013A successfully refreshed from Google Patents.
US5903013A
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US
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Thin film transistor and method of manufacturing the same
Assignee: SK Hynix Inc
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Filing: 1996-11-18
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Granted: 1999-05-11
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Expires: 2016-11-18
Abstract
Abstract A thin film transistor includes a substrate, a gate electrode formed on the substrate, and including opposing edge portions and a middle portion. An insulating film is formed on the surface of the gate electrode having a greater thickness on one of the gate edge portions. An active region is formed on the surface of the insulating film and the exposed substrate. The active region includes an off-set region, a channel region, a source region, and a drain region.
Inventors
- 👤 Sung Kge Park
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:30
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6715; H10D30/6717
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
131 words
A thin film transistor comprising: a substrate; a gate electrode on said substrate having an upper surface and two side surfaces, said upper surface having a first edge portion, a second edge portion and a middle portion; an insulating film on said upper surface and said two side surfaces, said insulating film having a first part overlying said first edge portion of said upper surface, and a second part overlying said middle and second edge portions of said upper surface, a thickness of said first part being greater than said second part; and an active region on a surface of said insulating film and said substrate, said active region including an off-set region, a channel region, a source region and a drain region, said off-set region overlying the first edge portion.
Claim 2
Dependent Claim
131 words
A thin film transistor comprising: a substrate; a gate electrode on said substrate having an upper surface and two side surfaces, said upper surface having a first edge portion, a second edge portion and a middle portion; an insulating film on said upper surface and said two side surfaces, said insulating film having a first part overlying said first edge portion of said upper surface, and a second part overlying said middle and second edge portions of said upper surface, a thickness of said first part being greater than said second part; and an active region on a surface of said insulating film and said substrate, said active region including an off-set region, a channel region, a source region and a drain region, said off-set region overlying the first edge portion.
Claim 3
Dependent Claim
97 words
A thin film transistor as claimed in claim 1, wherein said channel region is formed on a part of said surface of said insulating film above said middle portion of said gate electrode; said source region is formed on a part of said surface of said insulating film above said second edge portion of said gate electrode and on the surface of said substrate adjacent said second edge portion of said gate electrode; and said drain region is formed on a part of said surface of said substrate adjacent to first edge portion of said gate electrode.
Claim 4
Dependent Claim
23 words
A thin film transistor as claimed in claim 1, wherein said substrate includes material selected from a group of semiconductors and insulator material.
Claim 5
Dependent Claim
29 words
A thin film transistor as claimed in claim 1, further comprising an insulating layer formed between said substrate and said gate electrode, said source region and said drain region.
Claim 6
Dependent Claim
57 words
A thin film transistor as claimed in claim 1, further comprising an insulating film formed on said active region and having a source contact hole and a drain contact hole aligned with said source and drain regions, respectively; a source electrode formed in said source contact hole; and a drain electrode formed in said drain contact hole.
Claim 7
Dependent Claim
32 words
A thin film transistor as claimed in claim 1, wherein each of said first and second edge portions of said gate electrode has a sloped surface slanted away from said middle portion.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-05-10 | 2002-11-09 | 2003-05-11 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-10 | 2006-11-09 | 2007-05-11 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-10 | 2010-11-09 | 2011-05-11 | $7700.00 | Window Closed / Lapsed |