Method of fabricating a flash memory device

Claim 1

A method of fabricating a flash memory device, comprising the sequential steps of: forming an oxide film on a silicon substrate divided into a memory cell region, a high voltage transistor region and a low voltage transistor region by field oxide films; removing the oxide film formed in the memory cell region and forming a tunnel oxide film on the exposed silicon substrate; forming a first polysilicon layer on the entire structure including the field oxide films and removing some of the first polysilicon layer to leave the first polysilicon layer in active regions of the memory cell region and the high voltage transistor region; forming a dielectric film having an ONO structure on the entire structure including the field oxide films; removing the dielectric film formed in the low voltage transistor region and performing a cleaning process: forming a gate oxide film in the low voltage transistor region and forming a second polysilicon layer on the entire structure; removing the second polysilicon layer and the dielectric film formed in the high voltage transistor region and performing a cleaning process; sequentially forming a third polysilicon layer and a silicide layer on the entire structure; forming gate electrodes in the memory cell region, the high voltage transistor region and the low voltage transistor region by patterning process, respectively.

Claim 2

A method of fabricating a flash memory device, comprising the sequential steps of: forming an oxide film on a silicon substrate divided into a memory cell region, a high voltage transistor region and a low voltage transistor region by field oxide films; removing the oxide film formed in the memory cell region and forming a tunnel oxide film on the exposed silicon substrate; forming a first polysilicon layer on the entire structure including the field oxide films and removing some of the first polysilicon layer to leave the first polysilicon layer in active regions of the memory cell region and the high voltage transistor region; forming a dielectric film having an ONO structure on the entire structure including the field oxide films; removing the dielectric film formed in the low voltage transistor region and performing a cleaning process: forming a gate oxide film in the low voltage transistor region and forming a second polysilicon layer on the entire structure; removing the second polysilicon layer and the dielectric film formed in the high voltage transistor region and performing a cleaning process; sequentially forming a third polysilicon layer and a silicide layer on the entire structure; forming gate electrodes in the memory cell region, the high voltage transistor region and the low voltage transistor region by patterning process, respectively.

Claim 3

A method of fabricating a flash memory device, comprising the sequential steps of: forming an oxide film on a silicon substrate divided into a memory cell region, a high voltage transistor region and a low voltage transistor region by field oxide films; removing the oxide film formed in the memory cell region and forming a tunnel oxide film on the exposed silicon substrate; forming a first polysilicon layer on the entire structure including the field oxide films and removing some of the first polysilicon layer to leave the first polysilicon layer in active regions of the memory cell region and the high voltage transistor region; forming a dielectric film having an ONO structure on the entire structure including the field oxide films; removing the dielectric film formed in the low voltage transistor region and performing a cleaning process: forming a gate oxide film in the low voltage transistor region and forming a second polysilicon layer on the entire structure; removing the second polysilicon layer and the dielectric film formed in the high voltage transistor region and performing a cleaning process; forming a third polysilicon layer on the entire structure; forming gate electrodes in the memory cell region, the high voltage transistor region and the low voltage transistor region by patterning process, respectively.

Claim 4

A method of fabricating a flash memory device, comprising the sequential steps of: forming an oxide film on a silicon substrate divided into a memory cell region, a high voltage transistor region and a low voltage transistor region by field oxide films; removing the oxide film formed in the memory cell region and forming a tunnel oxide film on the exposed silicon substrate; forming a first polysilicon layer on the entire structure including the field oxide films and removing some of the first polysilicon layer to leave the first polysilicon layer in active regions of the memory cell region and the high voltage transistor region; forming a dielectric film having an ONO structure on the entire structure including the field oxide films; removing the dielectric film formed in the low voltage transistor region and performing a cleaning process: forming a gate oxide film in the low voltage transistor region and forming a second polysilicon layer on the entire structure; removing the second polysilicon layer and the dielectric film formed in the high voltage transistor region and performing a cleaning process; forming a third polysilicon layer on the entire structure; forming gate electrodes in the memory cell region, the high voltage transistor region and the low voltage transistor region by patterning process, respectively.