Anisotropic conductive sheet and printed circuit board

Claim 2

A circuit board comprising: a substrate having first and second surfaces and a circuit pattern being formed on said first surface of the substrate; an anisotropic conductive sheet having first and second surfaces, a circuit pattern being formed on and carried by said first surface of said anisotropic conductive sheet; said anisotropic conductive sheet carrying said circuit pattern being bonded to said substrate by adhering said second surface of the anisotropic conductive sheet to said first surface of the substrate so that said circuit pattern carried by said anisotropic conductive sheet on said first surface thereof is electrically connected to said circuit pattern on said first surface of said substrate by means of said anisotropic conductive sheet; and an electrically insulative layer formed on said first surface of said anisotropic conductive sheet to cover said circuit pattern of the anisotropic conductive sheet, except that external connecting portions thereof are exposed.

Claim 3

A circuit board as set forth in claim 1, wherein said anisotropic conductive sheet is partially pressed by means of said circuit pattern formed thereon so that said pressed portions of the anisotropic conductive sheet are electrically conductive.

Claim 4

A circuit board as set forth in claim 1, wherein bumps are provided on said circuit pattern formed on the substrate and said anisotropic conductive sheet is partially pressed by means of said bumps so that said pressed portions of the anisotropic conductive sheet are electrically conductive.

Claim 5

The circuit board as set forth in claim 1 wherein the electrically insulative layer comprises an insulation sheet having vias formed therethrough to permit contact with said circuit pattern carried thereon.

Claim 6

The circuit board as set forth in claim 4, wherein said insulation sheet, said anisotropic conductive sheet and said semiconductor chip form an integral body.

Claim 7

The circuit board as set forth in claim 4, wherein said insulation sheet is bonded to at least one additional insulation sheet which also carries a circuit pattern and having vias formed therethrough, said circuit patterns carried on said insulation sheets being electrically connected through said vias.

Claim 8

A circuit board comprising: a plurality of anisotropic conductive sheets layered to include a lowermost anisotropic conductive sheet and an uppermost anisotropic conductive sheet, each said anisotropic conductive sheet having first and second surfaces and a circuit pattern formed on and carried by said first surface thereof, said plurality of anisotropic conductive sheets being laminated on each other in such a manner that said second surface of all but said lowermost anisotropic conductive sheets is adhered to said first surface of an adjacent anisotropic conductive sheet; a substrate having first and second surfaces and a circuit pattern formed on said first surface of said substrate; and an electrically insulative layer formed on the first surface of said uppermost anisotropic conductive sheet to cover said circuit pattern thereof, except that external connecting portions thereof are exposed; wherein said first surface of said substrate is adhered to said second surface of said lowermost anisotropic conductive sheet; and said circuit patterns on said plurality of anisotropic conductive sheets and said substrate are electrically connected to each other by means of said plurality of anisotropic conductive sheets.

Claim 9

A circuit board comprising: a plurality of anisotropic conductive sheets layered to include a lowermost anisotropic conductive sheet and an uppermost anisotropic conductive sheet, each said anisotropic conductive sheet having first and second surfaces and a circuit pattern formed on and carried by said first surface thereof, said plurality of anisotropic conductive sheets being laminated on each other in such a manner that said second surface of all but said lowermost anisotropic conductive sheets is adhered to said first surface of an adjacent anisotropic conductive sheet; a substrate having first and second surfaces and a circuit pattern formed on said first surface of said substrate; and an electrically insulative layer formed on the first surface of said uppermost anisotropic conductive sheet to cover said circuit pattern thereof, except that external connecting portions thereof are exposed; wherein said first surface of said substrate is adhered to said second surface of said lowermost anisotropic conductive sheet; and said circuit patterns on said plurality of anisotropic conductive sheets and said substrate are electrically connected to each other by means of said plurality of anisotropic conductive sheets.

Claim 10

A circuit board as set forth in claim 7, wherein said plurality of anisotropic conductive sheets are partially pressed by means of said circuit patterns formed thereon so that said pressed portions of the anisotropic conductive sheets are electrically conductive.

Claim 11

A circuit board as set forth in claim 7, wherein bumps are provided on said circuit pattern formed on the substrate and said anisotropic conductive sheets, except for the uppermost anisotropic conductive sheet, said anisotropic conductive sheets are partially pressed by means of said bumps so that said pressed portions of the anisotropic conductive sheets are electrically conductive.

Claim 12

A circuit board as set forth in claim 7, wherein at least one of said circuit patterns formed on the substrate and on the plurality of anisotropic conductive sheets is a power supply flat pattern.

Claim 13

A circuit board as set forth in claim 7, wherein at least one of said circuit patterns formed on the substrate and on the plurality of anisotropic conductive sheets is a ground flat pattern.

Claim 14

A semiconductor device comprising: a semiconductor chip having upper and lower surfaces, said chip having electrodes formed on said upper surface; an electrically insulating film formed on said upper surface of said semiconductor chip, except for areas where said electrodes exist; and a plurality of anisotropic conductive sheets each having upper and lower surfaces and a circuit pattern formed on said upper surface thereof; wherein said plurality of anisotropic conductive sheets are laminated on each other in such a manner to include a lowermost anisotropic conductive sheet and an uppermost anisotropic conductive sheet, the lower surface of said uppermost anisotropic conductive sheet being adhered to the upper surface of an adjacent anisotropic conductive sheet and the upper surface of said lowermost anisotropic conductive sheet being adhered to the lower surface of an adjacent anisotropic conductive sheet; said upper surface of said semiconductor chip is adhered to the lower surface of said lowermost anisotropic conductive sheet; said circuit patterns on said plurality of anisotropic conductive sheets and said electrodes of said semiconductor chip are electrically connected to each other by means of said plurality of anisotropic conductive sheets; and said semiconductor device further comprises an electrically insulative layer formed on the upper surface of said uppermost anisotropic conductive sheet to cover said circuit pattern thereof, except that external connecting portions thereof are exposed.

Claim 15

A semiconductor device comprising: a semiconductor chip having upper and lower surfaces, said chip having electrodes formed on said upper surface; an electrically insulating film formed on said upper surface of said semiconductor chip, except for areas where said electrodes exist; and a plurality of anisotropic conductive sheets each having upper and lower surfaces and a circuit pattern formed on said upper surface thereof; wherein said plurality of anisotropic conductive sheets are laminated on each other in such a manner to include a lowermost anisotropic conductive sheet and an uppermost anisotropic conductive sheet, the lower surface of said uppermost anisotropic conductive sheet being adhered to the upper surface of an adjacent anisotropic conductive sheet and the upper surface of said lowermost anisotropic conductive sheet being adhered to the lower surface of an adjacent anisotropic conductive sheet; said upper surface of said semiconductor chip is adhered to the lower surface of said lowermost anisotropic conductive sheet; said circuit patterns on said plurality of anisotropic conductive sheets and said electrodes of said semiconductor chip are electrically connected to each other by means of said plurality of anisotropic conductive sheets; and said semiconductor device further comprises an electrically insulative layer formed on the upper surface of said uppermost anisotropic conductive sheet to cover said circuit pattern thereof, except that external connecting portions thereof are exposed.

Claim 16

A semiconductor device as set forth in claim 12, wherein said lowermost anisotropic conductive sheet is mechanically pressed partially at positions correspond to said electrodes, so that said pressed portions of the lowermost anisotropic conductive sheet are electrically conductive.

Claim 17

A semiconductor device as set forth in claim 12, wherein said electrodes of the semiconductor chip are provided with conductive bumps which protrude upward over said insulating film, so that said lowermost anisotropic conductive sheet is partially pressed by said bumps and, therefore, said pressed portions of the lowermost anisotropic conductive sheet are electrically conductive.

Claim 18

A semiconductor device as set forth in claim 12, wherein said external connecting terminals are solder bumps.

Claim 19

A semiconductor device as set forth in claim 12, wherein said plurality of anisotropic conductive sheets includes at least one intermediate anisotropic conductive sheet positioned between said uppermost and lowermost anisotropic conductive sheets, upper and lower surfaces of adjacent anisotropic conductive sheets being adhered together.

Claim 20

A semiconductor device as set forth in claim 12, wherein the lower surface of said uppermost anisotropic conductive sheet is adhered to the upper surface of said lowermost anisotropic conductive sheet.