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US3832769A Expired / Lapsed US ⏱️ 0.0 years remaining

Circuitry and method

Assignee: 3M Co
•
Filing: 1971-05-26
•
Granted: 1974-09-03
•
Expires: 1991-05-26
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Abstract

Abstract A method for mounting semiconductor chips to printed circuitry via conductive columns which extend through the dielectric substrate and electrically communicate with a predetermined pattern of conductive leads on the opposite surface of the substrate. Printed circuitry useful for practicing the method is also provided.

Inventors

  • 👤 M Olyphant
  • 👤 R Rohloff

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-23 21:51
CPC Classifications
H; H05; H05K; H05K1/00; H05K1/02; H05K1/11; H05K1/111; H05K1/112; H05K1/113; H10; H10N; H10N97/00; H10W; H10W70/00; H10W70/40; H10W70/453; H10W70/60; H10W70/611; H10W70/62; H10W70/63; H10W70/635; H10W70/67; H10W70/688; H05K1/03; H05K1/0393; H05K2201/00; H05K2201/03; H05K2201/0302; H05K2201/0305; H05K2201/0332; H05K2201/0388; H05K2201/0394; H05K2201/09; H05K2201/09209; H05K2201/09372; H05K2201/09472; H05K2201/095; H05K2201/09563; H05K2201/10; H05K2201/10613; H05K2201/10621; H05K2201/10674; H05K3/00; H05K3/40; H05K3/4038; H05K3/42; H05K3/423; H10W72/00; H10W72/071; H10W72/072; H10W72/07231; H10W72/07236; H10W90/00; H10W90/701; H10W90/721; H10W90/724; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/49126; Y10T29/4913; Y10T29/49144; Y10T29/49155; Y10T29/49165

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 166 words
A method for mounting a semiconductor chip to a printed circuit, the method comprising the steps of: a. providing a thin dielectric substrate having a thin conductive layer bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of said conductive layer, said apertures defining a predetermined pattern, c. forming, in said apertures, conductive columns which electrically communicate with the underside of said conductive layer and which have a portion thereof exposed to the opposite surface Of the substrate for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, d. converting said conductive layer to a predetermined pattern of conductive land areas, wherein a portion of the underside of each said conductive land area forming said predetermined pattern electrically communicates with a separate conductive column, and e. electrically bonding the contact pads of a semiconductor chip to said exposed portions of said conductive columns.
Claim 2
Independent Claim 166 words
A method for mounting a semiconductor chip to a printed circuit, the method comprising the steps of: a. providing a thin dielectric substrate having a thin conductive layer bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of said conductive layer, said apertures defining a predetermined pattern, c. forming, in said apertures, conductive columns which electrically communicate with the underside of said conductive layer and which have a portion thereof exposed to the opposite surface Of the substrate for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, d. converting said conductive layer to a predetermined pattern of conductive land areas, wherein a portion of the underside of each said conductive land area forming said predetermined pattern electrically communicates with a separate conductive column, and e. electrically bonding the contact pads of a semiconductor chip to said exposed portions of said conductive columns.
Claim 3
Independent Claim 155 words
A method for mounting a semiconductor chip to a printed circuit, the method comprising the steps of: a. providing a thin dielectric substrate having a thin conductive layer bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of said conductive layer, said apertures defining a predetermined pattern, c. converting said conductive layer to a predetermined pattern of conductive land areas, said predetermined pattern of conductive land areas being disposed so as to overlie said predetermined pattern of apertures, d. forming, in said apertures, conductive columns which electrically communicate with the underside of said conductive land areas and which have a portion thereof exposed for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, and e. electrically bonding the contact pads of a semiconductor device to said exposed portions of said conductive columns.
Claim 4
Independent Claim 155 words
A method for mounting a semiconductor chip to a printed circuit, the method comprising the steps of: a. providing a thin dielectric substrate having a thin conductive layer bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of said conductive layer, said apertures defining a predetermined pattern, c. converting said conductive layer to a predetermined pattern of conductive land areas, said predetermined pattern of conductive land areas being disposed so as to overlie said predetermined pattern of apertures, d. forming, in said apertures, conductive columns which electrically communicate with the underside of said conductive land areas and which have a portion thereof exposed for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, and e. electrically bonding the contact pads of a semiconductor device to said exposed portions of said conductive columns.
Claim 5
Independent Claim 137 words
A method for mounting a semiconductor chip to a printed circuit, the method comprising the steps of: a. providing a printed circuit comprising a thin dielectric substrate having a predetermined pattern of conductive land areas bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of at least a portion of said conductive land areas, said apertures defining a predetermined pattern, c. forming in said apertures conductive columns which electrically communicate with the underside of said conductive land areas and which have a portion thereof exposed for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, and d. electrically bonding the contact pads of a semiconductor chip to said exposed portions of said conductive columns.
Claim 6
Independent Claim 137 words
A method for mounting a semiconductor chip to a printed circuit, the method comprising the steps of: a. providing a printed circuit comprising a thin dielectric substrate having a predetermined pattern of conductive land areas bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of at least a portion of said conductive land areas, said apertures defining a predetermined pattern, c. forming in said apertures conductive columns which electrically communicate with the underside of said conductive land areas and which have a portion thereof exposed for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, and d. electrically bonding the contact pads of a semiconductor chip to said exposed portions of said conductive columns.
Claim 7
Independent Claim 238 words
A method for interconnecting a plurality of printed circuits comprising the steps of: a. providing a thin dielectric substrate having a thin conductive layer bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of said conductive layer, said apertures defining a predetermined pattern, c. forming, in said apertures, conductive columns which electrically communicate with the underside of said conductive layer and which have a portion thereof exposed for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, d. forming a first printed circuit by converting said conductive layer to a predetermined pattern of conductive land areas, wherein a portion of the underside of each said conductive land areas forming said predetermined pattern electrically communicates with a separate conductive column, e. electrically bonding the exposed portions of said conductive columns of said first printed circuit to a predetermined pattern of conductive land areas of a second printed circuit; said second printed circuit having a plurality of conductive columns extending through a dielectric substrate, one end of each of said columns resting against and electrically communicating with the underside of a single conductive land area of the predetermined pattern of land areAs, the other end of said conductive columns extending beyond the opposite surface of the dielectric substrate and being adapted to electrically receive further electrical circuitry.
Claim 8
Independent Claim 238 words
A method for interconnecting a plurality of printed circuits comprising the steps of: a. providing a thin dielectric substrate having a thin conductive layer bonded to one surface thereof, b. providing a plurality of apertures in said dielectric substrate, said apertures extending through said dielectric substrate and communicating with the underside of said conductive layer, said apertures defining a predetermined pattern, c. forming, in said apertures, conductive columns which electrically communicate with the underside of said conductive layer and which have a portion thereof exposed for connection to further electrical circuitry, said columns extending beyond the surface of said substrate, d. forming a first printed circuit by converting said conductive layer to a predetermined pattern of conductive land areas, wherein a portion of the underside of each said conductive land areas forming said predetermined pattern electrically communicates with a separate conductive column, e. electrically bonding the exposed portions of said conductive columns of said first printed circuit to a predetermined pattern of conductive land areas of a second printed circuit; said second printed circuit having a plurality of conductive columns extending through a dielectric substrate, one end of each of said columns resting against and electrically communicating with the underside of a single conductive land area of the predetermined pattern of land areAs, the other end of said conductive columns extending beyond the opposite surface of the dielectric substrate and being adapted to electrically receive further electrical circuitry.
Claim 9
Dependent Claim 28 words
A method in accordance with claim 4, wherein a semiconductor device is subsequently electrically bonded to the exposed ends of the conductive columns of said second printed circuit.
Claim 10
Dependent Claim 14 words
A method in accordance with claim 1, wherein said conductive columns comprise tin/lead solder.
Claim 11
Dependent Claim 13 words
A method in accordance with claim 1 wherein said conductive columns comprise copper.
Claim 12
Dependent Claim 17 words
A method in accordance with claim 7, wherein said copper conductive columns further comprise nickel and gold.
Claim 13
Dependent Claim 14 words
A method in accordance with claim 2, wherein said conductive columns comprise tin/lead solder.
Claim 14
Dependent Claim 14 words
A method in accordance with claim 3, wherein said conductive columns comprise tin/lead solder.
Claim 15
Dependent Claim 13 words
A method in accordance with claim 2, wherein said conductive columns comprise copper.
Claim 16
Dependent Claim 13 words
A method in accordance with claim 3, wherein said conductive columns comprise copper.
Claim 17
Dependent Claim 17 words
A method in accordance with claim 11, wherein said copper conductive columns further comprise nickel and gold.
Claim 18
Dependent Claim 17 words
A method in accordance with claim 12, wherein said copper conductive columns further comprise nickel and gold.
Claim 19
Dependent Claim 19 words
A method in accordance with claim 4, wherein said conductive columns of said first printed circuit comprise tin/lead solder.
Claim 20
Dependent Claim 21 words
A method in accordance with claim 4, wherein said conductive columns of said first and second printed circuits comprise tin/lead solder.
Claim 21
Dependent Claim 18 words
A method in accordance with claim 4, wherein said conductive columns of said first printed circuit comprise copper.
Claim 22
Dependent Claim 17 words
A method in accordance with claim 17, wherein said copper conductive columns further comprise nickel and gold.

References Cited (Backward Citations)

US3311966A Cited
US3488840A Cited
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US3561107A Cited
US3385773A Cited
US3436468A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1977-09-02 1978-03-04 1978-09-03 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1981-09-02 1982-03-04 1982-09-03 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 1985-09-02 1986-03-04 1986-09-03 $7700.00 Window Closed / Lapsed

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