Abstract A method of fabricating a field effect transistor with a spike-gate structure including forming a semiconductor layer on a semi-insulating substrate, and forming a recess having a spike shape in which a portion of a gate electrode projects into the semiconductor layer, in the semiconductor layer. The formation of the recess includes forming a narrow damaged layer in the semiconductor layer by one of focused ion beamion implantation and ion implantation; and wet-etching the semiconductor layer utilizing accelerated etching of the damaged layer, thereby forming a recess having a spike groove. As described above, without performing the complicated processes as in the prior art fabricating method shown in FIGS. 12(a)-12(i), by performing one FIB implantation process, an FET with a spike-gate structure can be fabricated by using simpler and fewer processes.
A field effect transistor comprising: a semi-insulating substrate; a conductive semiconductor layer disposed on the semi-insulating substrate; a source electrode and a drain electrode disposed on the semiconductor layer; a recess symmetrically disposed in the semiconductor layer between the source and drain electrodes, the recess including a spike groove extending into the semiconductor layer within the recess, deeper than other parts of the recess, and asymmetrically disposed between the source electrode and the drain electrode; and a gate electrode symmetrically disposed in the recess between the source electrode and the drain electrode, on the semiconductor layer, and filling the spike groove, the gate electrode being wider than the spike groove.
Claim 2
Dependent Claim
110 words
A field effect transistor comprising: a semi-insulating substrate; a conductive semiconductor layer disposed on the semi-insulating substrate; a source electrode and a drain electrode disposed on the semiconductor layer; a recess symmetrically disposed in the semiconductor layer between the source and drain electrodes, the recess including a spike groove extending into the semiconductor layer within the recess, deeper than other parts of the recess, and asymmetrically disposed between the source electrode and the drain electrode; and a gate electrode symmetrically disposed in the recess between the source electrode and the drain electrode, on the semiconductor layer, and filling the spike groove, the gate electrode being wider than the spike groove.