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US5885869A Expired / Lapsed US ⏱️ 0.0 years remaining

Method for uniformly doping hemispherical grain polycrystalline silicon

Assignee: Micron Technology Inc
•
Filing: 1995-09-14
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Granted: 1999-03-23
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Expires: 2015-09-14
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Abstract

Abstract A method is disclosed for uniformly doping HSG polycrystalline silicon independent of the other layers of the semiconductor substrate. A semiconductor substrate having a silicon dioxide layer formed superjacent a polysilicon layer is provided in a chamber. A doped rough silicon layer is formed in situ superjacent the silicon dioxide layer. This is accomplished by depositing the silicon layer superjacent the silicon dioxide layer and exposing the silicon layer to a source gas, a dopant gas, and energy, preferably in situ to thereby form uniformly doped silicon layer and roughened polysilicon layer using rapid thermal chemical vapor deposition techniques or low pressure chemical vapor deposition. Alternatively, a uniformly doped roughened polysilicon layer is formed superjacent the silicon dioxide layer in situ. This formation is achieved by depositing an amorphous silicon layer superjacent the silicon dioxide layer and roughening the amorphous silicon layer in situ. The step of roughening is achieved by vacuum annealing the amorphous silicon layer using rapid thermal chemical vapor deposition techniques or low pressure chemical vapor deposition. The roughened amorphous silicon layer is doped by exposing to a source gas, a dopant gas and energy.

Inventors

  • 👤 Charles Turner
  • 👤 Randhir P. S. Thakur

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 21:06
CPC Classifications
H; H10; H10D; H10D1/00; H10D1/60; H10D1/68; H10D1/692; H10D1/711; H10D1/712; H10B; H10B12/00; H10B12/30; H10B12/31; H10D1/01; H10D1/045; H10D1/047; H10P; H10P32/00; H10P32/30; H10P32/302; Y; Y10; Y10S; Y10S148/00; Y10S148/014; Y10S148/122; Y10S148/138

Claims Analysis

Total Claims: 20
Claim 1
Independent Claim 49 words
A method for fabricating semiconductor wafers, comprising the steps of: providing a semiconductor substrate, said substrate comprises a doped polysilicon layer having a silicon dioxide layer disposed thereon; and depositing a doped rough silicon layer directly upon said substrate by RTCVD at a temperature of at least 550° C.
Claim 2
Independent Claim 49 words
A method for fabricating semiconductor wafers, comprising the steps of: providing a semiconductor substrate, said substrate comprises a doped polysilicon layer having a silicon dioxide layer disposed thereon; and depositing a doped rough silicon layer directly upon said substrate by RTCVD at a temperature of at least 550° C.
Claim 3
Dependent Claim 39 words
A method for fabricating semiconductor wafers, according to claim 1, wherein said depositing comprises the steps of: depositing a silicon layer superjacent said substrate; and exposing said silicon layer to gas and energy, thereby forming a doped silicon layer.
Claim 4
Dependent Claim 34 words
A method for fabricating semiconductor wafers, according to claim 1 wherein said depositing comprises the steps of: depositing a silicon layer directly upon said substrate while exposing said silicon layer to gas and energy.
Claim 5
Dependent Claim 18 words
A method for fabricating semiconductor wafers, according to claim 2, wherein said silicon layer comprises hemispherical grain polysilicon.
Claim 6
Dependent Claim 21 words
A method for fabricating semiconductor wafers, according to claim 3, wherein said gas comprises a source gas and a dopant gas.
Claim 7
Dependent Claim 20 words
A method for fabricating semiconductor wafers, according to claim 5, wherein said method is performed in situ, thereby reducing contamination.
Claim 8
Independent Claim 67 words
A method for uniformly doping hemispherical grain polycrystalline silicon, comprising the steps of: providing a semiconductor substrate in a chamber, said substrate comprising a silicon dioxide layer superjacent a first polysilicon layer; and forming a doped rough second polysilicon layer directly upon said dioxide layer by simultaneous deposition and doping by RTCVD using energy and gas, wherein said energy generates a temperature of at least 550° C.
Claim 9
Independent Claim 67 words
A method for uniformly doping hemispherical grain polycrystalline silicon, comprising the steps of: providing a semiconductor substrate in a chamber, said substrate comprising a silicon dioxide layer superjacent a first polysilicon layer; and forming a doped rough second polysilicon layer directly upon said dioxide layer by simultaneous deposition and doping by RTCVD using energy and gas, wherein said energy generates a temperature of at least 550° C.
Claim 10
Dependent Claim 28 words
A method for uniformly doping hemispherical grain polycrystalline silicon, according to claim 7, wherein said gas comprises at least one of silane(SiH 4 ), disilane, trisilane, and dichlorosilane.
Claim 11
Dependent Claim 40 words
A method for uniformly doping hemispherical grain polycrystalline silicon, according to claim 8, wherein said gas comprises a source gas and dopant gas, said dopant gas comprising at least one of phosphine (PH 3 ), arsine, borane, diborane, and triborane.
Claim 12
Dependent Claim 22 words
A method for uniformly doping hemispherical grain polycrystalline silicon, according to claim 9, wherein said second polysilicon layer comprises hemispherical grain polysilicon.
Claim 13
Dependent Claim 21 words
A method for uniformly doping hemispherical grain polycrystalline silicon, according to claim 10, wherein said first polysilicon layer is doped polysilicon.
Claim 14
Dependent Claim 20 words
A method for uniformly doping hemispherical grain polycrystalline silicon, according to claim 11, wherein said method is performed in situ.
Claim 15
Independent Claim 95 words
A method for uniformly doping hemishperical grain polycrystalline silicon, comprising the steps of: providing a semiconductor substrate in a chamber, said substrate comprising a first polysilicon layer and a silicon dioxide layer disposed thereon; depositing an amorphous silicon layer directly upon said silicon dioxide layer in situ; roughening said amorphous silicon layer by vacuum annealing, wherein said roughening is performed at 10 -8 Torr, and said energy generates a temperature of at least 550° C. and doping said roughened amorphous silicon layer by exposing said roughened amorphous silicon layer to energy and gas by RTCVD.
Claim 16
Independent Claim 95 words
A method for uniformly doping hemishperical grain polycrystalline silicon, comprising the steps of: providing a semiconductor substrate in a chamber, said substrate comprising a first polysilicon layer and a silicon dioxide layer disposed thereon; depositing an amorphous silicon layer directly upon said silicon dioxide layer in situ; roughening said amorphous silicon layer by vacuum annealing, wherein said roughening is performed at 10 -8 Torr, and said energy generates a temperature of at least 550° C. and doping said roughened amorphous silicon layer by exposing said roughened amorphous silicon layer to energy and gas by RTCVD.
Claim 17
Dependent Claim 30 words
A method for uniformly doping hemispherical grain polycrystalline silicon, according to claim 13, wherein said gas further comprises at least one of silane (SiH 4 ), disilane, trisilane, and dichlorosilane.
Claim 18
Dependent Claim 31 words
A method for uniformly doping hemispherical grain polycrystalline silicon, according to claim 14, wherein said gas further comprises at least one of phosphine (PH 3 ), arsine, borane, diborane, and triborane.
Claim 19
Independent Claim 62 words
A method for forming a capacitor structure, comprising: providing a substrate having a doped polysilicon layer disposed thereon; depositing an insulator above said doped polysilicon layer; and simultaneously depositing and doping another polysilicon layer on said insulator by exposing said substrate to energy and gas at a temperature of at least 555° C. and a pressure of 10 -8 Torr by RTPCVD.
Claim 20
Independent Claim 62 words
A method for forming a capacitor structure, comprising: providing a substrate having a doped polysilicon layer disposed thereon; depositing an insulator above said doped polysilicon layer; and simultaneously depositing and doping another polysilicon layer on said insulator by exposing said substrate to energy and gas at a temperature of at least 555° C. and a pressure of 10 -8 Torr by RTPCVD.

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