US5881945A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Multi-layer solder seal band for semiconductor substrates and process
Assignee: International Business Machines Corp
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Filing: 1997-04-30
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Granted: 1999-03-16
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Expires: 2017-04-30
Abstract
Abstract The present invention relates generally to a new scheme of providing a seal band for semi-conductor substrates and chip carriers. More particularly, the invention encompasses a structure and a method that uses a multi-layer metallic seal to provide protection to chips on a chip carrier. This multi-layer metal seal provides both enhanced hermeticity lifetime and environmental protection. For the preferred embodiment the multi-layer metallic seal band is a three layer, solder sandwich structure which is used to create a low cost, high reliability, hermetic seal for the module. This solder sandwich has a high melting temperature thick solder inner core, and lower melting point thin interconnecting solder layers, where the thin interconnecting solder layers may have similar or different melting points.
Inventors
- 👤 David L. Edwards
- 👤 Armando S. Cammarano
- 👤 Jeffrey T. Coffin
- 👤 Mark G. Courtney
- 👤 Stephen S. Drofitz, Jr.
- 👤 Michael J. Ellsworth, Jr.
- 👤 Lewis S. Goldmann
- 👤 Sushumna Iruvanti
- 👤 Frank L. Pompeo
- 👤 William E. Sablinski
- 👤 Raed A. Sherif
- 👤 Hilton T. Toy
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 13:25
CPC Classifications
H; H10; H10W; H10W76/00; H10W76/60; H10W95/00; H10W72/00; H10W72/071; H10W72/072; H10W72/07251; H10W72/20; H10W72/851; H10W72/874; H10W72/877
Claims Analysis
Total Claims: 29
Claim 1
Independent Claim
128 words
A process for forming a hermetic seal band between a cover and a semiconductor substrate, comprising the steps of: (a) forming at least one solder preform band, where said solder preform band comprises of at least one first solder layer secured to one side of at least one high temperature solder core, and at least one second solder layer secured to the other side of said at least one high temperature solder core, (b) placing said solder preform band between said semiconductor substrate and said cover to form a sub-assembly, and (c) placing said sub-assembly in a thermal environment and reflowing said first and said second solder layers without reflowing said solder core layer such that a hermetic seal band is formed between said substrate and said cover.
Claim 2
Dependent Claim
128 words
A process for forming a hermetic seal band between a cover and a semiconductor substrate, comprising the steps of: (a) forming at least one solder preform band, where said solder preform band comprises of at least one first solder layer secured to one side of at least one high temperature solder core, and at least one second solder layer secured to the other side of said at least one high temperature solder core, (b) placing said solder preform band between said semiconductor substrate and said cover to form a sub-assembly, and (c) placing said sub-assembly in a thermal environment and reflowing said first and said second solder layers without reflowing said solder core layer such that a hermetic seal band is formed between said substrate and said cover.
Claim 3
Dependent Claim
35 words
The process of claim 1, wherein the melting point temperature difference between said high melting point solder core and said at least one first and/or second solder interconnection layer is at least about 50° C.
Claim 4
Dependent Claim
19 words
The process of claim 1, wherein said first and said second solder interconnection layers have the same melting point.
Claim 5
Dependent Claim
18 words
The process of claim 1, wherein said first and said second solder interconnection layers have different melting points.
Claim 6
Dependent Claim
22 words
The process of claim 1, wherein said first solder interconnection layer has a lower melting point than said second solder interconnection layer.
Claim 7
Dependent Claim
34 words
The process of claim 1, wherein material for said at least one first and/or second solder interconnection layer is selected from a group consisting of lead/tin, lead/indium, tin/bismuth, indium/silver, tin/antimony, tin/silver, and alloys thereof.
Claim 8
Dependent Claim
35 words
The process of claim 1, wherein said first and/or second solder interconnection layer is of a lead/tin material, and wherein said lead is in the range of about 0 to about 40 percent by weight.
Claim 9
Dependent Claim
35 words
The process of claim 1, wherein said first and/or second solder interconnection layer is of a lead/indium material, and wherein said lead is in the range of about 30 to about 60 percent by weight.
Claim 10
Dependent Claim
35 words
The process of claim 1, wherein said first and/or second solder interconnection layer is of a tin/bismuth material, and wherein said tin is in the range of about 37 to about 48 percent by weight.
Claim 11
Dependent Claim
30 words
The process of claim 1, wherein said first and/or second solder interconnection layer is a mixture having up to about 2 percent content by weight of copper or alloy thereof.
Claim 12
Dependent Claim
30 words
The process of claim 1, wherein material for said high melting point solder core is selected from a group consisting of lead/tin, lead/indium, tin/bismuth, indium/silver, tin/antimony, tin/silver, and alloys thereof.
Claim 13
Dependent Claim
34 words
The process of claim 1, wherein said high melting point solder core is of a lead/tin material, and wherein said lead is in the range of about 60 to about 100 percent by weight.
Claim 14
Dependent Claim
34 words
The process of claim 1, wherein said high melting point solder core is of a lead/indium material, and wherein said lead is in the range of about 70 to about 100 percent by weight.
Claim 15
Dependent Claim
34 words
The process of claim 1, wherein said high melting point solder core is of a tin/bismuth material, and wherein said tin is in the range of about 77 to about 100 percent by weight.
Claim 16
Dependent Claim
34 words
The process of claim 1, wherein said high melting point solder core is of a tin/bismuth material, and wherein said tin is in the range of about 0 to about 20 percent by weight.
Claim 17
Dependent Claim
29 words
The process of claim 1, wherein said high melting point solder core is an alloy having up to about 2 percent content by weight of copper or alloy thereof.
Claim 18
Dependent Claim
17 words
The process of claim 1, wherein at least one heat removing device is secured to said cover.
Claim 19
Dependent Claim
38 words
The process of claim 1, wherein said substrate has at least one solder wettable area of gold plating over nickel, and wherein a portion of said solder wettable area is secured to said solder layer during solder reflow.
Claim 20
Dependent Claim
38 words
The process of claim 1, wherein said cover has at least one solder wettable area of gold plating over nickel, and wherein a portion of said solder wettable area is secured to said solder layer during solder reflow.
Claim 21
Dependent Claim
19 words
The process of claim 1, wherein in step (b) said solder preform band is first secured to said cover.
Claim 22
Dependent Claim
29 words
The process of claim 1, wherein material for said substrate is selected from a group consisting of alumina, alumina with glass frits, aluminum nitride, borosilicate, ceramic and glass ceramic.
Claim 23
Dependent Claim
41 words
The process of claim 1, wherein at least one electrical connection is secured to said substrate, and wherein said electrical connection is selected from a group consisting of solder ball, solder column, low-melting point solder, high-melting point solder, pin or wire.
Claim 24
Dependent Claim
33 words
The process of claim 1, wherein at least one electrical element is secured to said substrate, and wherein said electrical element is selected from a group consisting of semiconductor chip or decoupling capacitor.
Claim 25
Dependent Claim
34 words
The process of claim 1, wherein material for said cover is selected from a group consisting of alumina, aluminum, aluminum nitride, composites of aluminum and silicon carbide, copper, copper-tungsten, cuvar, silvar, and alloys thereof.
Claim 26
Dependent Claim
127 words
A process for forming a hermetic seal band between a cover and a semiconductor substrate, comprising the steps of: (a) securing at least one first solder layer to said substrate, and forming a first sub-assembly, (b) securing at least one second solder layer to said cover, and forming a second sub-assembly, (c) placing at least one high temperature solder core preform between said first sub-assembly and said second sub-assembly, such that said first solder layer and said second solder layer sandwich said solder core, to form a third sub-assembly, (d) placing said third sub-assembly in a thermal environment and reflowing said first and said second solder layers without reflowing said solder core layer such that a hermetic seal band is formed between said substrate and said cover.
Claim 27
Dependent Claim
127 words
A process for forming a hermetic seal band between a cover and a semiconductor substrate, comprising the steps of: (a) securing at least one first solder layer to said substrate, and forming a first sub-assembly, (b) securing at least one second solder layer to said cover, and forming a second sub-assembly, (c) placing at least one high temperature solder core preform between said first sub-assembly and said second sub-assembly, such that said first solder layer and said second solder layer sandwich said solder core, to form a third sub-assembly, (d) placing said third sub-assembly in a thermal environment and reflowing said first and said second solder layers without reflowing said solder core layer such that a hermetic seal band is formed between said substrate and said cover.
Claim 28
Dependent Claim
151 words
A process for forming a hermetic seal band between a cover and a semiconductor substrate, comprising the steps of: (a) forming at least one solder preform band, where said solder preform band comprises of at least one first solder layer secured to one side of at least one high temperature solder core, (b) securing said solder preform band to said cover such that said first solder layer is in direct contact with said cover, (c) securing at least one second solder layer to the perimeter surface of said substrate, (d) placing said semiconductor substrate and said cover to form a sub-assembly, such that said solder core is in direct contact with said second layer, (e) placing said sub-assembly in a thermal environment and reflowing said first and said second solder layers without reflowing said solder core layer such that a hermetic seal band is formed between said substrate and said cover.
Claim 29
Dependent Claim
151 words
A process for forming a hermetic seal band between a cover and a semiconductor substrate, comprising the steps of: (a) forming at least one solder preform band, where said solder preform band comprises of at least one first solder layer secured to one side of at least one high temperature solder core, (b) securing said solder preform band to said cover such that said first solder layer is in direct contact with said cover, (c) securing at least one second solder layer to the perimeter surface of said substrate, (d) placing said semiconductor substrate and said cover to form a sub-assembly, such that said solder core is in direct contact with said second layer, (e) placing said sub-assembly in a thermal environment and reflowing said first and said second solder layers without reflowing said solder core layer such that a hermetic seal band is formed between said substrate and said cover.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-15 | 2002-09-14 | 2003-03-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-15 | 2006-09-14 | 2007-03-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-15 | 2010-09-14 | 2011-03-16 | $7700.00 | Window Closed / Lapsed |