US5881281A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method and apparatus for automatically loading configuration data on reset into a host adapter integrated circuit
Assignee: RPX Corp
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Filing: 1997-10-21
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Granted: 1999-03-09
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Expires: 2017-10-21
Abstract
Abstract Configuration data indicative of interface requirements for interfacing to a host adapter card are automatically serially loaded on reset from an external device on the card into a host adapter integrated circuit on the card. A driver program can then read the configuration data from the host adapter integrated circuit and thereby determine how to interface with the host adapter card.
Inventors
- 👤 Stillman F. Gates
- 👤 Paresh M. Borkar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 22:15
CPC Classifications
G; G06; G06F; G06F9/00; G06F9/06; G06F9/44; G06F9/4401; G06F9/4411
Claims Analysis
Total Claims: 17
Claim 1
Independent Claim
122 words
A method of loading configuration data after a reset condition into a host adapter integrated circuit from an external device, comprising: receiving a reset signal on a first terminal of a host adapter integrated circuit, said host adapter integrated circuit being operatively coupled to a host; and upon a deassertion of said reset signal, automatically outputting a clock signal from a second terminal of said host adapter integrated circuit to said external device such that configuration data is clocked out of said external device and into a third terminal of said host adapter integrated circuit, said reset signal remaining deasserted throughout said loading of said configuration data, said configuration data not being transferred from said host to said host adapter integrated circuit.
Claim 2
Independent Claim
122 words
A method of loading configuration data after a reset condition into a host adapter integrated circuit from an external device, comprising: receiving a reset signal on a first terminal of a host adapter integrated circuit, said host adapter integrated circuit being operatively coupled to a host; and upon a deassertion of said reset signal, automatically outputting a clock signal from a second terminal of said host adapter integrated circuit to said external device such that configuration data is clocked out of said external device and into a third terminal of said host adapter integrated circuit, said reset signal remaining deasserted throughout said loading of said configuration data, said configuration data not being transferred from said host to said host adapter integrated circuit.
Claim 3
Dependent Claim
27 words
The method of claim 1, wherein the external device is taken from the group consisting of: a ROM, a PAL, a fuse device, and an antifuse device.
Claim 4
Independent Claim
206 words
A system, comprising: a host; a first storage device storing first configuration data and having a first terminal and a second terminal; and a first host adapter integrated circuit operatively coupled to said host, said first host adapter integrated circuit outputting a clock signal to said first terminal of said first storage device such that said first configuration data from said first storage device is output from said second terminal of said first storage device and is loaded serially into said first host adapter integrated circuit, said first configuration data being indicative of a first set of interface requirements; a second storage device storing second configuration data and having a first terminal and a second terminal; and a second host adapter integrated circuit operatively coupled to said host, said second host adapter integrated circuit outputting a clock signal to said first terminal of said second storage device such that said second configuration data from said second storage device is output from said second terminal of said second storage device and is loaded serially into said second host adapter integrated circuit, said second configuration data being indicative of a second set of interface requirements, said first and second host adapter integrated circuits being substantially identical integrated circuits.
Claim 5
Independent Claim
206 words
A system, comprising: a host; a first storage device storing first configuration data and having a first terminal and a second terminal; and a first host adapter integrated circuit operatively coupled to said host, said first host adapter integrated circuit outputting a clock signal to said first terminal of said first storage device such that said first configuration data from said first storage device is output from said second terminal of said first storage device and is loaded serially into said first host adapter integrated circuit, said first configuration data being indicative of a first set of interface requirements; a second storage device storing second configuration data and having a first terminal and a second terminal; and a second host adapter integrated circuit operatively coupled to said host, said second host adapter integrated circuit outputting a clock signal to said first terminal of said second storage device such that said second configuration data from said second storage device is output from said second terminal of said second storage device and is loaded serially into said second host adapter integrated circuit, said second configuration data being indicative of a second set of interface requirements, said first and second host adapter integrated circuits being substantially identical integrated circuits.
Claim 6
Dependent Claim
33 words
The method of claim 3, wherein the first storage device and the second storage device are taken from the group consisting of: a ROM, a PAL, a fuse device and an antifuse device.
Claim 7
Independent Claim
151 words
A system, comprising: a host; a peripheral device; means for storing configuration data external to said host; and a host adapter integrated circuit operatively coupled to said peripheral device via a first bus, said host adapter integrated circuit comprising: a first terminal; a second terminal; a shift register having a clock input lead, a serial data input lead, and a plurality of parallel data output leads, said clock input lead being coupled to said first terminal, said serial data input lead being coupled to said second terminal, said second terminal being coupled to said means for storing configuration data such that configuration data is output from said means and onto said second terminal under control of said host adapter integrated circuit after a power up condition without said configuration data passing into or out of said host; and a system bus interface operatively coupled to said host via a second bus.
Claim 8
Independent Claim
151 words
A system, comprising: a host; a peripheral device; means for storing configuration data external to said host; and a host adapter integrated circuit operatively coupled to said peripheral device via a first bus, said host adapter integrated circuit comprising: a first terminal; a second terminal; a shift register having a clock input lead, a serial data input lead, and a plurality of parallel data output leads, said clock input lead being coupled to said first terminal, said serial data input lead being coupled to said second terminal, said second terminal being coupled to said means for storing configuration data such that configuration data is output from said means and onto said second terminal under control of said host adapter integrated circuit after a power up condition without said configuration data passing into or out of said host; and a system bus interface operatively coupled to said host via a second bus.
Claim 9
Dependent Claim
67 words
The system of claim 5, wherein said host adapter integrated circuit further comprises: a multiplexer having a plurality of first input leads, a plurality of second input leads, a plurality of output leads, and a select input lead, each of said plurality of first input leads of said multiplexer being coupled to a corresponding one of said plurality of parallel data output leads of said shift register.
Claim 10
Dependent Claim
24 words
The system of claim 6, wherein configuration data on said plurality of output leads of said multiplexer is accessible from said system bus interface.
Claim 11
Dependent Claim
63 words
The system of claim 7, wherein said host adapter integrated circuit further comprises: a decoder having a plurality of input leads and an output lead, said plurality of input leads of said decoder being coupled to said plurality of parallel data output leads of said shift register, said output lead of said decoder being coupled to said select input lead of said multiplexer.
Claim 12
Dependent Claim
30 words
The system of claim 5, wherein said clock input lead of said shift register is coupled to said first terminal via an output buffer of said host adapter integrated circuit.
Claim 13
Dependent Claim
19 words
The system of claim 5, wherein said first terminal is an output terminal of said host adapter integrated circuit.
Claim 14
Dependent Claim
17 words
The system of claim 5, further comprising a light emitting diode (LED) coupled to said first terminal.
Claim 15
Dependent Claim
49 words
The system of claim 5, wherein said means for storing has a clock input terminal coupled to said first terminal of said host adapter integrated circuit, and wherein said means for storing has a serial data output terminal coupled to said second terminal of said host adapter integrated circuit.
Claim 16
Dependent Claim
32 words
The system of claim 5, wherein said host adapter integrated circuit further comprises: a third terminal coupled to receive a reset signal; and a fourth terminal coupled to receive a clock signal.
Claim 17
Dependent Claim
21 words
The system of claim 5, wherein said first bus is a SCSI bus and said second bus is a PCI bus.
References Cited (Backward Citations)
US5459867A
Cited
US5452424A
Cited
US5274783A
Cited
US5479618A
Cited
US5555438A
Cited
US5367647A
Cited
US5226040A
Cited
US5319754A
Cited
US5243274A
Cited
US5659690A
Cited
US5657455A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-03-08 | 2002-09-07 | 2003-03-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-03-08 | 2006-09-07 | 2007-03-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-03-08 | 2010-09-07 | 2011-03-09 | $7700.00 | Window Closed / Lapsed |