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Method for forming field oxide film

Assignee: Samsung Electronics Co Ltd
•
Filing: 1996-10-15
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Granted: 1999-03-09
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Expires: 2016-10-15
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Abstract

Abstract A method for forming a field oxide film includes the steps of: (i) laminating a gate insulating film, a polysilicon layer and a first silicon nitride film over the entire surface of a semiconductor substrate in this order; (ii) patterning the gate insulating film, the polysilicon layer and the first silicon nitride film to a desired shape; (iii) forming a sidewall spacer of a second silicon nitride film on a side wall of the gate insulating film, the polysilicon layer and the first silicon nitride film; (iv) selectively etching a portion of the semiconductor substrate with the first silicon nitride film and the sidewall spacer used as a mask; and (v) forming a field oxide film on the etched portion of the semiconductor substrate in a self-aligned manner relative to the polysilicon layer. According to the invention, lifting up of the polysilicon layer caused by the bird's beak of the field oxide film coming under the polysilicon layer can be reduced. Also, horizontal extension (in a direction parallel to the substrate surface) of the bird's beak can be controlled.

Inventors

  • 👤 Yukiharu Akiyama
  • 👤 Shinichi Sato

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 03:48
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10D30/00; H10D30/01; H10D30/021; H10D30/0411; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0121; H10W10/10; H10W10/13; H10B; H10B69/00; H10D64/01346; H10D64/60; H10D64/66; H10D64/68; H10D64/693

Claims Analysis

Total Claims: 8
Claim 1
Independent Claim 227 words
A method for forming a field oxide film for a floating gate memory device, comprising the steps of: (i) laminating a gate insulating film, a polysilicon layer and a first silicon nitride film, in that order, over the entire surface of a semiconductor substrate; (ii) patterning the gate insulating film, the polysilicon layer and the first silicon nitride film to a desired shape; (iii) forming a sidewall spacer of a second silicon nitride film on a side wall of the patterned gate insulating film, polysilicon layer and first silicon nitride film; (iv) selectively etching a portion of the semiconductor substrate with the first silicon nitride film and the sidewall spacer used as a mask; (v) forming a field oxide film on the etched portion of the semiconductor substrate in a self-aligned manner relative to the polysilicon layer, where the mask is formed by the first silicon nitride film and the sidewall spacer; (vi) removing the first silicon nitride film and the sidewall spacer of the mask; (vii) forming an insulating layer over the entire surface of the semiconductor substrate, including the polysilicon layer, (viii) laminating a second polysilicon layer on the insulating layer, and (ix) successively etching the second polysilicon layer, the insulating layer, the gate insulating film and the polysilicon layer to form a control gate and a floating gate of the floating gate memory device.
Claim 2
Independent Claim 227 words
A method for forming a field oxide film for a floating gate memory device, comprising the steps of: (i) laminating a gate insulating film, a polysilicon layer and a first silicon nitride film, in that order, over the entire surface of a semiconductor substrate; (ii) patterning the gate insulating film, the polysilicon layer and the first silicon nitride film to a desired shape; (iii) forming a sidewall spacer of a second silicon nitride film on a side wall of the patterned gate insulating film, polysilicon layer and first silicon nitride film; (iv) selectively etching a portion of the semiconductor substrate with the first silicon nitride film and the sidewall spacer used as a mask; (v) forming a field oxide film on the etched portion of the semiconductor substrate in a self-aligned manner relative to the polysilicon layer, where the mask is formed by the first silicon nitride film and the sidewall spacer; (vi) removing the first silicon nitride film and the sidewall spacer of the mask; (vii) forming an insulating layer over the entire surface of the semiconductor substrate, including the polysilicon layer, (viii) laminating a second polysilicon layer on the insulating layer, and (ix) successively etching the second polysilicon layer, the insulating layer, the gate insulating film and the polysilicon layer to form a control gate and a floating gate of the floating gate memory device.
Claim 3
Dependent Claim 30 words
A method for forming a field oxide film according to claim 1, in which the gate insulating film is an oxide film containing nitrogen at the interface to the substrate.
Claim 4
Dependent Claim 43 words
A method for forming a field oxide film according to claim 1, in which after the gate insulating film is formed in step (i) the gate insulating film is treated with N 2 O or NH 3 gas to incorporate nitrogen atoms therein.
Claim 5
Dependent Claim 38 words
A method for forming a field oxide film according to claim 1, in which after the gate insulating film is formed in step (i) the gate insulating film is implanted with nitrogen ions to incorporate nitrogen atoms therein.
Claim 6
Dependent Claim 41 words
A method for forming a field oxide film according to claim 3, in which a number of nitrogen atoms in the gate insulating film is about 0.7% to about 1.0% of the total number of atoms in the gate insulating film.
Claim 7
Dependent Claim 35 words
A method for forming a field oxide film according to claim 4, in which the gate insulating film is implanted with nitrogen ions in a dose of 10×10 15 to 2.0×l0 15 cm -2 .
Claim 8
Dependent Claim 39 words
A method for forming a field oxide film according to claim 1 wherein the insulating layer between the floating gate and control gate is a three layer structure having an oxide film, a nitride film and an oxide film.

References Cited (Backward Citations)

JPS5976472A Cited
JPH0294479A Cited
US5106772A Cited
US5298451A Cited
US5399520A Cited
US5374585A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-03-08 2002-09-07 2003-03-09 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-03-08 2006-09-07 2007-03-09 $3760.00 Window Closed / Lapsed
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