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US5873053A Expired / Lapsed US ⏱️ 0.0 years remaining

On-chip thermometry for control of chip operating temperature

Assignee: International Business Machines Corp
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Filing: 1997-04-08
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Granted: 1999-02-16
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Expires: 2017-04-08
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Abstract

Abstract Temperatures on a chip, including particular regions of a chip are monitored by sensing changes in sub-threshold conduction of a field effect transistor (FET) integrated on the chip due to changes in charge carrier population distribution with temperature therein. Such changes in sub-threshold current with temperature are preferably detected using a current mirror and two FETs with different channel geometry and slightly different gate voltages such that the currents are equal at a specific design temperature. The slightly different gate voltages are conveniently provided by a low current voltage divider with or without on-chip voltage regulation in which resistor ratios can be accurately and repeatably obtained. Variations from that temperature thus yield large current differences and substantial signal swing which improve noise immunity. Hysteresis can be applied to the output (or amplified output) of the current mirror to obtain bistable thermostat-like action. Variant applications provide sensing at plural chip locations (e.g. for sensing temperature gradients and temperatures of autonomously operating portions of the chip) and a plurality of temperatures on the chip. Temperatures thus monitored control implementation of performance enhancing algorithms in regard to the chip.

Inventors

  • 👤 Wilbur D. Pricer
  • 👤 Wendell P. Noble
  • 👤 John A. Fifield
  • 👤 John E. Gersbach

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-08 15:09
CPC Classifications
G; G01; G01K; G01K7/00; G01K7/01; Y; Y10; Y10S; Y10S323/00; Y10S323/907

Claims Analysis

Total Claims: 23
Claim 1
Independent Claim 54 words
An integrated circuit including an on-chip temperature sensor including two field effect transistors capable of carrying equal currents at a specific temperature and with a difference of sub-threshold voltage applied to respective control electrodes thereof, and means for sensing differences in sub-threshold current in said two transistors at temperatures other than said specific temperature.
Claim 2
Dependent Claim 54 words
An integrated circuit including an on-chip temperature sensor including two field effect transistors capable of carrying equal currents at a specific temperature and with a difference of sub-threshold voltage applied to respective control electrodes thereof, and means for sensing differences in sub-threshold current in said two transistors at temperatures other than said specific temperature.
Claim 3
Dependent Claim 35 words
An integrated circuit as recited in claim 1, wherein one of said two field effect transistors has a first width-to-length ratio different from a second width-to-length ratio of another of said two field effect transistors.
Claim 4
Dependent Claim 29 words
An integrated circuit as recited in claim 2, wherein one of said first and second width-to-length ratios is approximately ten times another of said first and second width-to-length ratios.
Claim 5
Dependent Claim 26 words
An integrated circuit as recited in claim 1, further including means for raising the source potential of said at least two transistors above a substrate potential.
Claim 6
Dependent Claim 16 words
An integrated circuit as recited in claim 1, further including a third sensor field effect transistor.
Claim 7
Dependent Claim 31 words
An integrated circuit as recited in claim 5, wherein said third sensor field effect transistor has a third width-to-length ratio different from said first width-to-length ratio and said second width-to-length ratio.
Claim 8
Dependent Claim 48 words
An integrated circuit as recited in claim 5, further including means for applying a potential to a control electrode of said third sensor field effect transistor which is equal to a voltage applied to a control electrode of one of said first and second sensor field effect transistors.
Claim 9
Dependent Claim 28 words
An integrated circuit as recited in claim 1, further including a series resistance voltage divider having a large total resistance, a filter means connected to said voltage divider.
Claim 10
Dependent Claim 18 words
An integrated circuit as recited in claim 1, further including a regulated power supply for said voltage divider.
Claim 11
Dependent Claim 32 words
An integrated circuit as recited in claim 8, wherein said voltage divider comprises a plurality of resistors, at least one of said plurality of resistors having a fuse connected in parallel therewith.
Claim 12
Dependent Claim 31 words
An integrated circuit as recited in claim 1, wherein said means for sensing differences in current in said two transistors at temperatures other than said specific temperature includes a current mirror.
Claim 13
Independent Claim 63 words
A method of sensing change of temperature on an integrated circuit chip including the steps of applying a first sub-threshold voltage to a field effect transistor formed together with said integrated circuit chip, and monitoring changes in sub-threshold current in said field effect transistor due to changes, with temperature, in charge carrier population distribution relative to a barrier in said field effect transistor.
Claim 14
Independent Claim 63 words
A method of sensing change of temperature on an integrated circuit chip including the steps of applying a first sub-threshold voltage to a field effect transistor formed together with said integrated circuit chip, and monitoring changes in sub-threshold current in said field effect transistor due to changes, with temperature, in charge carrier population distribution relative to a barrier in said field effect transistor.
Claim 15
Dependent Claim 37 words
A method as recited in claim 12, wherein said monitoring step includes comparing current in said field effect transistor with sub-threshold current in another field effect transistor having a different width-to-length ratio than said field effect transistor.
Claim 16
Dependent Claim 18 words
A method as recited in claim 13, including the further step of applying hysteresis to said comparing step.
Claim 17
Dependent Claim 22 words
A method as recited in claim 13, including the further step of applying a second voltage to said another field effect transistor.
Claim 18
Dependent Claim 20 words
A method as recited in claim 15, including the further step of trimming one of said first and second voltages.
Claim 19
Dependent Claim 16 words
A method as recited in claim 12, including the further step of filtering said first voltage.
Claim 20
Dependent Claim 26 words
A method as recited in claim 12, including the further step of controlling a refresh rate of a dynamic memory in accordance with said monitoring step.
Claim 21
Dependent Claim 22 words
A method as recited in claim 12, including the further step of controlling a clock frequency in accordance with said monitoring step.
Claim 22
Dependent Claim 22 words
A method as recited in claim 12, including the further step of suspending a clock signal in accordance with said monitoring step.
Claim 23
Dependent Claim 23 words
A method as recited in claim 12, including the further step of altering a power supply voltage in accordance with said monitoring step.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-02-15 2002-08-17 2003-02-16 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-02-15 2006-08-17 2007-02-16 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-02-15 2010-08-17 2011-02-16 $7700.00 Window Closed / Lapsed

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