Patent US5869391A successfully refreshed from Google Patents.
US5869391A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor method of making electrical connection between an electrically conductive line and a node location, and integrated circuitry
Assignee: Micron Technology Inc
•
Filing: 1996-08-20
•
Granted: 1999-02-09
•
Expires: 2016-08-20
Abstract
Abstract A semiconductor processing method of making electrical connection between an electrically conductive line and a node location includes, a) forming an electrically conductive line over a substrate, the substrate having an outwardly exposed silicon containing node location to which electrical connection is to be made, the line having an outer portion and an inner portion, the inner portion laterally extending outward from the outer portion and having an outwardly exposed portion, the inner portion having a terminus adjacent the node location, and b) electrically connecting the extending inner portion with the node location. An integrated circuit is also described. The integrated circuit includes a semiconductor substrate, a node location on the substrate, and a conductive line over the substrate which is in electrical communication with the node location. The conductive line includes an outer portion and an inner portion. The outer portion has a terminus and the inner portion extends laterally away from the outer portion terminus and generally toward the node location. The inner portion is in electrical communication with the node location.
Inventors
- 👤 Monte Manning
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 02:42
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/031; H10W20/0698
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
238 words
A semiconductor processing method of making electrical connection between an electrically conductive line and a node location comprising: providing a substrate having an outer dielectric surface and a node location to which electrical connection is to be made; forming a first layer over the outer dielectric surface and the node location; forming a patterned masking layer over the first layer laterally adjacent the node location; forming a second layer over the first layer and the patterned masking layer; patterning and etching the first and second layers and forming an electrically conductive line therefrom, the second layer of the line having a terminus positioned over the patterned masking layer, the first layer of the line forming an extension which extends laterally outward relative to the second layer terminus; after patterning and etching the first and second layers: depositing an insulating material over at least the second layer terminus and the first layer extension: and conducting an anisotropic spacer etch of the insulating material to leave a sidewall spacer over the second layer terminus and to remove at least some of the masking layer to expose a portion of the first layer; and wherein the step of electrically connecting includes forming a silicide bridge interconnecting at least some of the first layer's exposed portion and the node location; and electrically connecting the first layer extension, the second layer, and the node location with conductive material formed over the node location.
Claim 2
Dependent Claim
238 words
A semiconductor processing method of making electrical connection between an electrically conductive line and a node location comprising: providing a substrate having an outer dielectric surface and a node location to which electrical connection is to be made; forming a first layer over the outer dielectric surface and the node location; forming a patterned masking layer over the first layer laterally adjacent the node location; forming a second layer over the first layer and the patterned masking layer; patterning and etching the first and second layers and forming an electrically conductive line therefrom, the second layer of the line having a terminus positioned over the patterned masking layer, the first layer of the line forming an extension which extends laterally outward relative to the second layer terminus; after patterning and etching the first and second layers: depositing an insulating material over at least the second layer terminus and the first layer extension: and conducting an anisotropic spacer etch of the insulating material to leave a sidewall spacer over the second layer terminus and to remove at least some of the masking layer to expose a portion of the first layer; and wherein the step of electrically connecting includes forming a silicide bridge interconnecting at least some of the first layer's exposed portion and the node location; and electrically connecting the first layer extension, the second layer, and the node location with conductive material formed over the node location.
Claim 3
Dependent Claim
20 words
The method of claim 1, wherein the first layer comprises polysilicon which is electrically conductive prior to patterning and etching.
Claim 4
Dependent Claim
20 words
The method of claim 1, wherein the first layer comprises polysilicon which is rendered electrically conductive after patterning and etching.
Claim 5
Dependent Claim
53 words
The method of claim 1, wherein the second layer is electrically conductive and includes a conductivity enhancing impurity, the first layer is electrically conductive and comprises polysilicon which is rendered electrically conductive after provision over the outer dielectric surface and node location substantially by outdiffusion of conductivity enhancing impurity from the second layer.
Claim 6
Dependent Claim
51 words
The method of claim 1, wherein the patterned masking layer is doped with a conductivity enhancing impurity, the first layer is electrically conductive and comprises polysilicon which is rendered electrically conductive after provision over the outer dielectric surface and node location by outdiffusion of conductivity enhancing impurity from the masking layer.
Claim 7
Dependent Claim
70 words
The method of claim 1 further comprising after patterning and etching the first and second layers, removing at least some of the masking layer laterally adjacent the second layer terminus and adjacent the node location to expose an underlying portion of the first layer; and wherein the step of electrically connecting includes forming a silicide bridge interconnecting at least some of the first layer's exposed portion and the node location.
Claim 8
Dependent Claim
45 words
The method of claim 1, wherein the step of electrically connecting comprises forming a refractory metal layer over at least a portion of the first layer extension and the node location and exposing the substrate to conditions effective to form a silicide connecting bridge therebetween.
Claim 9
Dependent Claim
55 words
The method of claim 1, wherein prior to said electrically connecting, removing at least some of the masking layer overlying the first layer extension to expose at least some of the first layer extension, and forming a refractory metal layer over at least a portion of the exposed first layer extension and the node location.
Claim 10
Dependent Claim
215 words
A semiconductor processing method of making electrical connection between an electrically conductive line and a node location comprising: forming an electrically conductive line over a substrate, the substrate having an outwardly exposed silicon containing node location to which electrical connection is to be made, the line having an outer portion and an inner portion, the inner portion laterally extending outward from the outer portion and having an outwardly exposed silicon containing portion, the inner portion having a terminus adjacent the node location; forming a metal layer over the exposed inner portion and the exposed node location; and exposing the substrate to conditions effective to form an electrically conductive metal silicide interconnect between the extending inner portion and the node location, both the outer and inner portions being in electrical communication with the node location through said metal silicide interconnect, wherein the outer portion has a terminus, and the inner portion having an outwardly exposed silicon containing portion is formed by the steps of: forming a masking layer atop the inner portion; forming a sidewall spacer on the outer portion terminus, the sidewall spacer covering at least a part of the masking layer; and removing an amount of the masking layer which is not covered by the sidewall spacer to form the exposed silicon containing portion.
Claim 11
Dependent Claim
215 words
A semiconductor processing method of making electrical connection between an electrically conductive line and a node location comprising: forming an electrically conductive line over a substrate, the substrate having an outwardly exposed silicon containing node location to which electrical connection is to be made, the line having an outer portion and an inner portion, the inner portion laterally extending outward from the outer portion and having an outwardly exposed silicon containing portion, the inner portion having a terminus adjacent the node location; forming a metal layer over the exposed inner portion and the exposed node location; and exposing the substrate to conditions effective to form an electrically conductive metal silicide interconnect between the extending inner portion and the node location, both the outer and inner portions being in electrical communication with the node location through said metal silicide interconnect, wherein the outer portion has a terminus, and the inner portion having an outwardly exposed silicon containing portion is formed by the steps of: forming a masking layer atop the inner portion; forming a sidewall spacer on the outer portion terminus, the sidewall spacer covering at least a part of the masking layer; and removing an amount of the masking layer which is not covered by the sidewall spacer to form the exposed silicon containing portion.
Claim 12
Dependent Claim
41 words
The method of claim 9 further comprising forming a masking layer elevationally between at least a part of the outer portion and at least a part of the inner portion, the masking layer serving to protect underlying conductive line inner portion.
Claim 13
Dependent Claim
104 words
The method of claim 9, wherein the steps of forming a sidewall spacer on the outer portion terminus and removing an amount of the masking layer which is not covered by the sidewall spacer comprise the steps of: forming an insulating material over at least part of the conductive line outer portion and part of the masking layer; and conducting an anisotropic etch of the insulating material to a degree sufficient to leave a sidewall spacer on at least most of the outer portion terminus, the etch serving to remove a part of the masking layer which is not covered by the sidewall spacer.
Claim 14
Dependent Claim
20 words
The method of claim 9, wherein the outer and inner portions have respective thicknesses which are different from one another.
Claim 15
Dependent Claim
31 words
The method of claim 9, wherein the outer and inner portions have respective thicknesses which are different from one another, the outer portion thickness being greater than the inner portion thickness.
Claim 16
Dependent Claim
13 words
The method of claim 9, wherein the outer and inner portions comprise polysilicon.
Claim 17
Dependent Claim
40 words
The method of claim 9, wherein the outer and inner portions comprise polysilicon, the outer portion contains a conductivity enhancing impurity and the inner portion is rendered electrically conductive substantially by outdiffusion of conductivity enhancing impurity from the outer portion.
Claim 18
Dependent Claim
28 words
The method of claim 9, further comprising forming a conductive diffusion region in the substrate adjacent the inner portion terminus, the conductive diffusion region comprising the node location.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-08 | 2002-08-10 | 2003-02-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-08 | 2006-08-10 | 2007-02-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-08 | 2010-08-10 | 2011-02-09 | $7700.00 | Window Closed / Lapsed |