US5869353A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Modular panel stacking process
Assignee: Hanger Solutions LLC
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Filing: 1997-11-17
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Granted: 1999-02-09
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Expires: 2017-11-17
Abstract
Abstract A method of making chip stacks begins with the formation of a plurality of panels having apertures therein and conductive pads on opposite sides thereof. Solder paste is deposited on the conductive pads prior to mounting plastic packaged IC chips within each of the apertures in each of the panels so that opposite leads thereof reside on the conductive pads at opposite sides of the apertures. The plural panels are then assembled into a stack, such as by use of a tooling jig which aligns the various panels and holds them together in compressed fashion. The assembled panel stack is heated so that the solder paste solders the leads of the packaged chips to the conductive pads and interfacing conductive pads of adjacent panels together, to form a panel stack comprised of a plurality of chip package stacks. Following cleaning of the panel stack to remove solder flux residue, the individual chip package stacks are separated from the panel stack by cutting and breaking the stack. Score lines across a topmost panel and transverse slots within remaining panels therebelow result in the formation of strips of chip package stacks when longitudinal cuts are made through the panel stack. The remaining portions of the uppermost panel within such strips are then snapped along the score lines thereof to separate the individual chip package stacks from the strips.
Inventors
- 👤 Aaron Uri Levy
- 👤 John Patrick Sprint
- 👤 John Arthur Forthun
- 👤 Harlan Ruben Isaak
- 👤 Joel Andrew Mearig
- 👤 Mark Chandler Calkins
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 11:20
CPC Classifications
H; H10; H10W; H10W90/00; H05; H05K; H05K1/00; H05K1/02; H05K1/14; H05K1/144; H05K1/18; H05K1/182; H10W70/00; H10W70/40; H10W70/60; H10W90/20
Claims Analysis
Total Claims: 8
Claim 1
Independent Claim
290 words
A method of making chip stacks comprising the steps of: providing a plurality of panels, each having a plurality of apertures therein and a plurality of conductive pads thereon; providing a plurality of packaged chips having leads extending therefrom; mounting the plurality of packaged chips within the plurality of apertures in the plurality of panels so that the leads thereof are disposed on at least some of the plurality of conductive pads on the plurality of panels; assembling the plurality of panels into a panel stack; soldering the leads of the packaged chips to at least some of the plurality of conductive pads and at least some of the conductive pads on adjacent panels together to form chip package stacks within the panel stack; and separating the individual chip package stacks from the panel stack; wherein one of the plurality of panels is scored to facilitate breaking of the panel between adjacent chip package stacks, and the remaining ones of the plurality of panels have elongated slots therein to facilitate separation of adjacent chip package stacks; and wherein said one of the plurality of panels is scored along a plurality of spaced-apart, parallel score lines which are perpendicular to the elongated slots in said remaining ones of the plurality of panels, and the step of separating the individual chip package stacks includes the steps of cutting through the panel stack along a plurality of spaced-apart, parallel lines which are perpendicular to the score lines, to form a plurality of strips of the chip package stacks, and within each strip breaking the strip along the score lines of a portion of said one of the plurality of panels within the strip to separate the individual chip package stacks from the strip.
Claim 2
Independent Claim
290 words
A method of making chip stacks comprising the steps of: providing a plurality of panels, each having a plurality of apertures therein and a plurality of conductive pads thereon; providing a plurality of packaged chips having leads extending therefrom; mounting the plurality of packaged chips within the plurality of apertures in the plurality of panels so that the leads thereof are disposed on at least some of the plurality of conductive pads on the plurality of panels; assembling the plurality of panels into a panel stack; soldering the leads of the packaged chips to at least some of the plurality of conductive pads and at least some of the conductive pads on adjacent panels together to form chip package stacks within the panel stack; and separating the individual chip package stacks from the panel stack; wherein one of the plurality of panels is scored to facilitate breaking of the panel between adjacent chip package stacks, and the remaining ones of the plurality of panels have elongated slots therein to facilitate separation of adjacent chip package stacks; and wherein said one of the plurality of panels is scored along a plurality of spaced-apart, parallel score lines which are perpendicular to the elongated slots in said remaining ones of the plurality of panels, and the step of separating the individual chip package stacks includes the steps of cutting through the panel stack along a plurality of spaced-apart, parallel lines which are perpendicular to the score lines, to form a plurality of strips of the chip package stacks, and within each strip breaking the strip along the score lines of a portion of said one of the plurality of panels within the strip to separate the individual chip package stacks from the strip.
Claim 3
Independent Claim
200 words
A method of making chip stacks comprising the steps of: providing a plurality of thin, planar panels, each having a plurality of apertures therein, a plurality of conductive pads on opposite surfaces of the panel adjacent each of the plurality of apertures, and a plurality of slots therein on opposite sides of each of the plurality of apertures; mounting a different one of a plurality of packaged chips having leads within each of the plurality of apertures of each of the plurality of panels; assembling the plurality of panels into a panel stack; bonding the leads of the plurality of packaged chips to at least some of the plurality of conductive pads of the panels on which the packaged chips are mounted, and bonding at least some of the plurality of conductive pads of each panel to at least some of the conductive pads on at least one adjacent panel of the plurality of panels to form chip package stacks within the panel stack; and cutting through each of the plurality of panels within the panel stack along lines perpendicular to the plurality of slots in each of the panels to separate the chip package stacks from the panel stack.
Claim 4
Independent Claim
200 words
A method of making chip stacks comprising the steps of: providing a plurality of thin, planar panels, each having a plurality of apertures therein, a plurality of conductive pads on opposite surfaces of the panel adjacent each of the plurality of apertures, and a plurality of slots therein on opposite sides of each of the plurality of apertures; mounting a different one of a plurality of packaged chips having leads within each of the plurality of apertures of each of the plurality of panels; assembling the plurality of panels into a panel stack; bonding the leads of the plurality of packaged chips to at least some of the plurality of conductive pads of the panels on which the packaged chips are mounted, and bonding at least some of the plurality of conductive pads of each panel to at least some of the conductive pads on at least one adjacent panel of the plurality of panels to form chip package stacks within the panel stack; and cutting through each of the plurality of panels within the panel stack along lines perpendicular to the plurality of slots in each of the panels to separate the chip package stacks from the panel stack.
Claim 5
Dependent Claim
37 words
The method set forth in claim 2, wherein one of the plurality of thin, planar panels is formed without the pluralit of slots therein and is broken following the cutting step to separate the chip package stacks.
Claim 6
Dependent Claim
53 words
The method set forth in claim 2, wherein the plurality of apertures in each panel are arranged into columns thereof extending along a length of the panel and rows thereof extending across a width of the panel and the plurality of slots in the panel are located between adjacent rows of the apertures.
Claim 7
Dependent Claim
37 words
The method set forth in claim 4, wherein the step of cutting is performed by cutting through each panel of the panel stack along the length of the panel adjacent opposite sides of the columns of apertures.
Claim 8
Dependent Claim
116 words
The method set forth in claim 2, wherein each of the plurality of apertures in each of the panels is of rectangular configuration so as to have four side edges which are surrounded by the conductive pads on each of the opposite sides of the panel, and each of the packaged chips comprises a thin, small outline chip package of rectangular configuration having plural leads extending from a pair of opposite side edges of the package and onto the conductive pads adjacent an opposite pair of side edges of an aperture in which the chip package is mounted, the chip package having a thickness like a thickness of the panel between opposite sides of the panel.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-08 | 2002-08-10 | 2003-02-09 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-08 | 2006-08-10 | 2007-02-09 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-08 | 2010-08-10 | 2011-02-09 | $7700.00 | Window Closed / Lapsed |