US5856068A
Expired / Lapsed
US
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Method for fabricating a printed circuit board by curing under superatmospheric pressure
Assignee: NXP USA Inc
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Filing: 1997-05-02
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Granted: 1999-01-05
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Expires: 2017-05-02
Abstract
Abstract A process for fabricating a multilayer printed circuit board, in which interlayer adhesion of the layers is greatly enhanced by curing under superatmospheric pressure. The method generally includes depositing a first resin layer (12) onto a substrate (10), which is then patterned so as to cross-link a preselected portion of the resin layer (12). A second resin layer (18) is then deposited over the first resin layer (12), and then patterned to cross-link a portion thereof. Openings in the first and second resins are developed by removing those portions of the resins that were not cross-linked during patterning. Openings (26) in the second resin layer (18) provide access to the first resin layer (12) by subsequent chemical processes. The portions of the first (12) and second (18) resin layers cross-linked during patterning remain on the substrate (10) to form permanent dielectric layers. The first resin layer (12) preferably includes a filler catalytic to plating, thereby enabling direct plating of the first resin layer (12) to form metal features within the multilayer structure. The process yields a multilayer printed circuit board that exhibits increased interlayer adhesion subsequent to plating caused by curing the first and second resin under superatmospheric pressure.
Inventors
- 👤 Yaroslaw Antin Magera
- 👤 Everett Furber Simons
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 11:00
CPC Classifications
H; H05; H05K; H05K3/00; H05K3/10; H05K3/18; H05K3/181; H05K3/182; H05K3/184; H05K3/46; H05K3/4644; H05K3/4661; H05K2201/00; H05K2201/02; H05K2201/0203; H05K2201/0206; H05K2201/0236; H05K2203/00; H05K2203/07; H05K2203/0736; H05K2203/074; H05K2203/11; H05K2203/1105; H05K2203/1157; H05K2203/12; H05K2203/125; H05K3/0011; H05K3/0017; H05K3/0023
Claims Analysis
Total Claims: 27
Claim 1
Independent Claim
71 words
A method for fabricating a printed circuit board, the method comprising the steps of: depositing a resin layer formed of a dielectric resin onto a substrate; plating a conductor pattern onto at least a portion of the resin layer; and heating at a temperature and for a time sufficient to cure said resin layer, said heating being carried out at superatmospheric pressure so as to form a substantially polymerized monolithic structure.
Claim 2
Independent Claim
71 words
A method for fabricating a printed circuit board, the method comprising the steps of: depositing a resin layer formed of a dielectric resin onto a substrate; plating a conductor pattern onto at least a portion of the resin layer; and heating at a temperature and for a time sufficient to cure said resin layer, said heating being carried out at superatmospheric pressure so as to form a substantially polymerized monolithic structure.
Claim 3
Dependent Claim
49 words
A method for fabricating a printed circuit board in accordance with claim 1, further comprising the step of patterning the resin layer prior to plating, said patterning creating an opening in the resin layer, said opening including an opening side wall that is plated during the step of plating.
Claim 4
Dependent Claim
83 words
A method for fabricating a printed circuit board in accordance with claim 2, further comprising the steps of: depositing a second resin layer on the resin layer prior to plating; and patterning the second resin layer so as to create an opening in the second resin layer such that the second resin layer forms a dielectric layer on the substrate and masks an area of the resin layer such that the step of plating plates in the opening in the second resin layer.
Claim 5
Dependent Claim
143 words
A method for fabricating a printed circuit board in accordance with claim 1, further comprising the steps of: depositing a second resin layer formed of a second resin that is formed of a photo-definable resin onto the first resin layer; patterning the second resin layer so as to at least partially cross-link a portion thereof; and developing an opening in the second resin layer by removing portions of the second resin layer that were not cross-linked during the patterning step, the portion of the second resin layer that was cross-linked during the patterning step remaining to form a dielectric layer on the substrate, such that the remaining area of the second resin forms a second dielectric layer on the substrate and masks an area of the resin layer such that the step of plating plates in the opening in the second resin layer.
Claim 6
Dependent Claim
57 words
A method for fabricating a printed circuit board in accordance with claim 4, further comprising the step of patterning the resin layer after the opening has been created in the second resin layer but prior to electroless plating to create an opening in the resin layer that is accessible through the opening in the second resin layer.
Claim 7
Dependent Claim
29 words
A method for fabricating a printed circuit board in accordance with claim 1, wherein the step of heating is carried out at a pressure above about 1 Mega Pascal.
Claim 8
Dependent Claim
73 words
A method for fabricating a printed circuit board in accordance with claim 1, wherein the resin layer contains a catalytic filler, the method further comprising the step of treating a surface region of the resin layer exposed by the opening in the second resin layer prior to the step of plating, said treating being effective to change the surface texture of the resin layer exposed by the opening in the second resin layer.
Claim 9
Dependent Claim
30 words
A method for fabricating a printed circuit board in accordance with claim 1, wherein the resin layer and the second resin layer have different bulk capacitive, conductive and magnetic properties.
Claim 10
Independent Claim
209 words
A method for fabricating a printed circuit board, the method comprising the steps of: depositing a first resin layer formed of a first photo-definable resin onto a substrate; patterning the first resin layer so as to at least partially cross-link a portion thereof; developing a first opening in the first resin layer by removing portions of the first resin layer that were not cross-linked during the patterning step; depositing a second resin layer formed of a second photo-definable resin onto the first resin layer; patterning the second resin layer so as to partially cross-link a portion thereof; developing a second opening in the second resin layer by removing portions of the second resin layer that were not cross-linked during the patterning step, the portion of the second resin layer that was cross-linked during the patterning step remaining to form a dielectric layer on the substrate, the second opening being superimposed over the first opening; plating a conductor pattern onto an area on the first resin layer exposed by the second opening; and heating at a temperature and for a time sufficient to cure said first resin layer and said second resin layer, said heating being carried out at superatmospheric pressure so as to form a substantially polymerized monolithic structure.
Claim 11
Independent Claim
209 words
A method for fabricating a printed circuit board, the method comprising the steps of: depositing a first resin layer formed of a first photo-definable resin onto a substrate; patterning the first resin layer so as to at least partially cross-link a portion thereof; developing a first opening in the first resin layer by removing portions of the first resin layer that were not cross-linked during the patterning step; depositing a second resin layer formed of a second photo-definable resin onto the first resin layer; patterning the second resin layer so as to partially cross-link a portion thereof; developing a second opening in the second resin layer by removing portions of the second resin layer that were not cross-linked during the patterning step, the portion of the second resin layer that was cross-linked during the patterning step remaining to form a dielectric layer on the substrate, the second opening being superimposed over the first opening; plating a conductor pattern onto an area on the first resin layer exposed by the second opening; and heating at a temperature and for a time sufficient to cure said first resin layer and said second resin layer, said heating being carried out at superatmospheric pressure so as to form a substantially polymerized monolithic structure.
Claim 12
Dependent Claim
37 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein the step of heating produces a lip in the second resin layer, said lip extending onto an exposed surface of the conductor pattern.
Claim 13
Dependent Claim
29 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein the step of heating is carried out at a pressure above about 1 Mega Pascal.
Claim 14
Dependent Claim
29 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein the step of heating is carried out at a pressure above about 2 Mega Pascal.
Claim 15
Dependent Claim
26 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein the step of heating is carried out at above about 100° C.
Claim 16
Dependent Claim
28 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein the developing step results in the second opening being larger than the first opening.
Claim 17
Dependent Claim
67 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein the first resin layer contains a catalytic filler, the method further comprising the step of treating a surface region of the first dielectric layer exposed by the second opening prior to electroless plating so as to change the surface texture of the area of the first resin layer exposed by the second opening.
Claim 18
Dependent Claim
61 words
A method for fabricating a printed circuit board in accordance with claim 15, further comprising the step of treating a surface region of the first resin layer exposed by the second opening, prior to electroless plating, so as to form thereon a catalytic film for electroless plating on the surface region of the first resin layer exposed by the second opening.
Claim 19
Dependent Claim
54 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein each of the steps of depositing and patterning the first resin layer and the second resin layer and developing the openings in the first resin layer and the second resin layer are performed simultaneously on opposing surfaces of the substrate.
Claim 20
Dependent Claim
28 words
A method for fabricating a printed circuit board in accordance with claim 9, wherein the first and second resin layers have different bulk capacitive, conductive and magnetic properties.
Claim 21
Independent Claim
260 words
A method for fabricating a printed circuit board, the method comprising the steps of: formulating first and second photodefinable resin layers containing photo initiators, at least one of the first and second photodefinable resin layers containing metal oxide particles that are convertible to form an electroless plating catalyst; depositing the first photodefinable resin layer onto a substrate; patterning the first photodefinable resin layer so as to partially cross-link a portion thereof; depositing the second photodefinable resin layer onto the first photodefinable resin; patterning the second photodefinable resin layer so as to at least partially cross-link a portion thereof; simultaneously developing an opening in the first photodefinable resin layer and an opening in the second photodefinable resin layer by removing portions of the first and second photodefinable resin layers that were not cross-linked during the patterning steps, the portions of the first and second photodefinable resin layers that were cross-linked during the patterning steps remaining to form first and second permanent dielectric layers, respectively, on the substrate, the opening in the second photodefinable resin layer exposing the opening in the first photodefinable resin layer; converting the metal oxide particles at a surface region of at least one of the first and second photodefinable resin layers to form thereon a catalytic film; electrolessly plating the surface region of the catalytic film; and heating at a temperature and for a time sufficient to cure the first and second photodefinable resin layers, said heating being carried out at a superatmospheric pressure above about 1 MPa so as to form a substantially polymerized monolithic structure.
Claim 22
Independent Claim
260 words
A method for fabricating a printed circuit board, the method comprising the steps of: formulating first and second photodefinable resin layers containing photo initiators, at least one of the first and second photodefinable resin layers containing metal oxide particles that are convertible to form an electroless plating catalyst; depositing the first photodefinable resin layer onto a substrate; patterning the first photodefinable resin layer so as to partially cross-link a portion thereof; depositing the second photodefinable resin layer onto the first photodefinable resin; patterning the second photodefinable resin layer so as to at least partially cross-link a portion thereof; simultaneously developing an opening in the first photodefinable resin layer and an opening in the second photodefinable resin layer by removing portions of the first and second photodefinable resin layers that were not cross-linked during the patterning steps, the portions of the first and second photodefinable resin layers that were cross-linked during the patterning steps remaining to form first and second permanent dielectric layers, respectively, on the substrate, the opening in the second photodefinable resin layer exposing the opening in the first photodefinable resin layer; converting the metal oxide particles at a surface region of at least one of the first and second photodefinable resin layers to form thereon a catalytic film; electrolessly plating the surface region of the catalytic film; and heating at a temperature and for a time sufficient to cure the first and second photodefinable resin layers, said heating being carried out at a superatmospheric pressure above about 1 MPa so as to form a substantially polymerized monolithic structure.
Claim 23
Dependent Claim
37 words
A method for fabricating a printed circuit board in accordance with claim 19, wherein the step of heating produces a lip in the second resin layer, said lip extending onto an exposed surface of the conductor pattern.
Claim 24
Dependent Claim
47 words
A method for fabricating a printed circuit board in accordance with claim 19, further comprising the step of forming a metal region on the substrate prior to depositing the first photodefinable resin layer thereon, wherein the opening in the first photodefinable resin layer exposes the metal region.
Claim 25
Dependent Claim
64 words
A method for fabricating a printed circuit board in accordance with claim 19, wherein the second photodefinable resin layer does not contain metal oxide particles, the converting and plating steps resulting in the metallization being formed on surfaces of the first photodefinable resin layer exposed by the opening in the second photodefinable resin layer and not on surfaces of the second photodefinable resin layer.
Claim 26
Dependent Claim
51 words
A method for fabricating a printed circuit board in accordance with claim 19, wherein each of the steps of depositing and patterning the first and second photodefinable resin layers and simultaneously developing the openings in the first and second photodefinable resin layers are performed simultaneously on opposing surfaces of the substrate.
Claim 27
Dependent Claim
29 words
A method for fabricating a printed circuit board in accordance with claim 19, wherein the first and second photodefinable resin layers have different bulk capacitive, conductive and magnetic properties.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-01-04 | 2002-07-06 | 2003-01-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-01-04 | 2006-07-06 | 2007-01-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-01-04 | 2010-07-06 | 2011-01-05 | $7700.00 | Window Closed / Lapsed |