Parallel access micro-TLB to speed up address translation

Claim 1

A memory management unit for virtual to physical address translation in a computer system, comprising a translation lookaside buffer which includes a plurality of entries and a plurality of comparators for each of said entries, wherein each of said entries has an address field, the address field of each of said entries is connected to a first input line of each of said plurality of comparators for said entry, a respective one of a plurality of signals, each signal indicating a respective virtual address to be translated by said memory management unit, is carried on a second input line of each of said plurality of comparators and the addresses stored in the address field of each of said entries are each simultaneously compared with each of the virtual addresses indicated by a respective one of said plurality of signals; further comprising: a plurality of caches; a plurality of input buffers; a plurality of command request buffers, each connected to receive signals from (a) said translation-lookaside-buffer, (b) a plurality of caches, and (c) said plurality of input buffers, wherein said plurality of input buffers are also connected to receive signals from said plurality of caches; and arbiter logic, connected to receive signals from said plurality of command request buffers and which selects one of the signals received from said command request buffers and determines which of said signals received from said command request buffers is to be processed.

Claim 9

A method for arbitrating among a plurality of pending requests for processing, each pending command request being in a buffer having an associated priority, comprising the steps of: (a) selecting a pending command request from a first buffer having a highest priority for processing; (b) if at a time of selecting said pending request there is a pending command request in another buffer having a lower priority, setting a masking bit associated with said pending command request from said first buffer; (c) processing said pending command request from said first buffer; (d) after processing said pending command request from said first buffer, selecting as the next pending request a command request from another buffer having a lower priority, in accordance with said masking bit; (e) processing a pending request from said another buffer having a lower priority, even if an additional command request is pending in said first buffer; (f) initializing the masking bits associated with each buffer; and (g) repeating steps (a) through (f) until all of said pending command requests are processed.

Claim 10

A method for arbitrating among a plurality of pending requests for processing, each pending command request being in a buffer having an associated priority, comprising the steps of: (a) selecting a pending command request from a first buffer having a highest priority for processing; (b) if at a time of selecting said pending request there is a pending command request in another buffer having a lower priority, setting a masking bit associated with said pending command request from said first buffer; (c) processing said pending command request from said first buffer; (d) after processing said pending command request from said first buffer, selecting as the next pending request a command request from another buffer having a lower priority, in accordance with said masking bit; (e) processing a pending request from said another buffer having a lower priority, even if an additional command request is pending in said first buffer; (f) initializing the masking bits associated with each buffer; and (g) repeating steps (a) through (f) until all of said pending command requests are processed.