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US5818084A Expired / Lapsed US ⏱️ 0.0 years remaining

Pseudo-Schottky diode

Assignee: Vishay Siliconix Inc
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Filing: 1996-05-15
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Granted: 1998-10-06
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Expires: 2016-05-15
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Abstract

Abstract An N-channel MOSFET is fabricated with its source, body and gate connected together and biased at a positive voltage with respect to its drain. The resulting two-terminal device functions generally in the manner of a diode but has a significantly lower turn-on voltage than a conventional PN diode. The device is therefore referred to as a "pseudo-Schottky diode". Pseudo-Schottky diodes have numerous uses, but they are particularly useful when connected to shunt current from a conventional PN diode or MOSFET and thereby prevent such conditions as snapback and latchup which can result from the storage of minority carriers in a forward-biased PN junction. Also, because the pseudo-Schottky diode is a majority carrier device, the diode recovery time, amount of stored charge, and peak reverse current are much lower than in a conventional PN diode.

Inventors

  • 👤 Richard K. Williams
  • 👤 Robert Blattner

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-30 16:22
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/64; H10D30/66; H10D30/668; H10D8/00; H10D84/00; H10D84/101; H10D84/141; H10D84/80; H10D84/811

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 138 words
A semiconductor device comprising: a source region of a first conductivity type; a body region of a second conductivity type opposite to said first conductivity type adjacent said source region; a drain region of said first conductivity type adjacent said body region; and a gate separated by an insulating layer from a channel region of said body region, wherein said source region, said body region and said drain region are formed in a semiconductor chip, said gate being positioned in a trench which is formed at a surface of said chip, said source region, said body region and said gate being shorted together and biased at a first voltage and said drain region being biased at a second voltage, said first and second voltages being established such that a junction between said body and said drain is forward-biased.
Claim 2
Dependent Claim 138 words
A semiconductor device comprising: a source region of a first conductivity type; a body region of a second conductivity type opposite to said first conductivity type adjacent said source region; a drain region of said first conductivity type adjacent said body region; and a gate separated by an insulating layer from a channel region of said body region, wherein said source region, said body region and said drain region are formed in a semiconductor chip, said gate being positioned in a trench which is formed at a surface of said chip, said source region, said body region and said gate being shorted together and biased at a first voltage and said drain region being biased at a second voltage, said first and second voltages being established such that a junction between said body and said drain is forward-biased.
Claim 3
Dependent Claim 34 words
The semiconductor device of claim 1 wherein said source region and said body region are adjacent a top side of said chip and said drain region is adjacent a back side of said chip.
Claim 4
Dependent Claim 23 words
The semiconductor device of claim 1 wherein a thickness of said insulating layer is in the range of 400 Å to 1000 Å.
Claim 5
Dependent Claim 24 words
A combination including the semiconductor device of claim 1 and a PN diode, said PN diode being connected between said source and drain regions.
Claim 6
Dependent Claim 34 words
The combination of claim 4 wherein said diode has an anode and a cathode, wherein said source region is electrically connected with said anode and said drain region is electrically connected with said cathode.
Claim 7
Dependent Claim 19 words
The combination of claim 4, said semiconductor device and said PN diode being formed on a single integrated circuit.
Claim 8
Dependent Claim 56 words
A combination including the semiconductor device of claim 1 and a transistor, said transistor having a second drain region and a second body region, wherein said source region of said semiconductor device is electrically connected to said second body region and said drain region of said semiconductor device is electrically connected to said second drain region.
Claim 9
Dependent Claim 18 words
The combination of claim 7 wherein said semiconductor device and said transistor are formed in said semiconductor chip.
Claim 10
Dependent Claim 38 words
A power converter comprising: a switch and a diode connected in series; an inductor connected to a common node between said switch and said diode; and the semiconductor device of claim 1 connected in parallel with said diode.
Claim 11
Dependent Claim 57 words
A power converter comprising: a first MOSFET of a first conductivity type and a second MOSFET of a second conductivity type opposite to said first conductivity type connected in series; an inductor connected to a common node between said first and second MOSFETs; and the semiconductor device of claim 1 connected in parallel with said first MOSFET.
Claim 12
Dependent Claim 29 words
The power converter of claim 10 further comprising a third MOSFET connected in parallel with said second MOSFET, said third MOSFET having source, body and drain terminals shorted together.
Claim 13
Dependent Claim 38 words
A power converter comprising: an inductor and a switch connected in series; a diode connected to a common node between said switch and said inductor; and the semiconductor device of claim 1 connected in parallel with said diode.
Claim 14
Dependent Claim 33 words
A current mirror arrangement comprising: the semiconductor device of claim 1 connected to a supply voltage; and a MOSFET, a gate of said MOSFET being connected to said gate of said semiconductor device.
Claim 15
Dependent Claim 124 words
A semiconductor device formed within a transistor comprising: a source region of a first conductivity type; a body region of a second conductivity type adjacent said source region; a drain region of said first conductivity type adjacent said body region; a first gate separated by a first insulating layer from a channel region of said body region, and a second gate separated by a second insulating layer from a channel region of said body region, wherein said source region, said body region and said second gate are shorted together and biased at a first voltage and said drain region is biased at a second voltage, said first and second voltages being established such that a junction between said body and said drain is forward-biased.
Claim 16
Dependent Claim 124 words
A semiconductor device formed within a transistor comprising: a source region of a first conductivity type; a body region of a second conductivity type adjacent said source region; a drain region of said first conductivity type adjacent said body region; a first gate separated by a first insulating layer from a channel region of said body region, and a second gate separated by a second insulating layer from a channel region of said body region, wherein said source region, said body region and said second gate are shorted together and biased at a first voltage and said drain region is biased at a second voltage, said first and second voltages being established such that a junction between said body and said drain is forward-biased.

References Cited (Backward Citations)

JPS5895856A Cited
US4967243A Cited
US5304802A Cited
EP0675543A2 Cited

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