US5815715A
Expired / Lapsed
US
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Method for designing a product having hardware and software components and product therefor
Assignee: NXP USA Inc
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Filing: 1995-06-05
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Granted: 1998-09-29
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Expires: 2015-06-05
Abstract
Abstract A computing system (10) and a method for designing the computing system (10) using hardware and software components. The computing system (10) includes programmable coprocessors (12, 13) having the same architectural style. Each coprocessor includes a sequencer (36) and a programmable interconnect network (34) and a varying number of functional units and storage elements. The computing system (10) is designed by using a compiler (71) to generate a host microprocessor code from a portion of an application software code and a coprocessor code from the portion of the application software code. The compiler (71) uses the host microprocessor code to determine the execution speed of the host microprocessor and the coprocessor code to determine the execution speed of the coprocessor and selects one of the host microprocessor or the coprocessor for execution of the portion of the application software code. Then the compiler (71) creates a code that serves as the software program.
Inventors
- 👤 Kayhan Kuçukçakar
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 05:36
CPC Classifications
G; G06; G06F; G06F8/00; G06F8/40; G06F8/41; G06F8/45; G06F8/451; G06F30/00; G06F30/30; G06F8/20
Claims Analysis
Total Claims: 24
Claim 1
Independent Claim
179 words
A method for designing a product having hardware and software components, comprising the steps of: providing a library of coprocessor components and a description of each coprocessor component in the library of coprocessor components; providing a library of programmable coprocessors and a netlist representation of each programmable coprocessor in the library of programmable coprocessors comprised of the library of coprocessor components, wherein each programmable coprocessor of the library of programmable coprocessors has a uniform and predetermined architectural style; extracting the functionality of each programmable coprocessor from the netlist representation; providing a software application; and mapping the software application to a product, which product comprises a host microprocessor, at least one programmable coprocessor from the library of programmable coprocessors, and a software program, wherein the software program is: executable on the host microprocessor; programs the at least one programmable coprocessor from the library of programmable coprocessors to perform a function; executes a portion of the software application on the host microprocessor; and dispatches a portion of the software application to one or more of the at least one programmable coprocessor.
Claim 2
Independent Claim
179 words
A method for designing a product having hardware and software components, comprising the steps of: providing a library of coprocessor components and a description of each coprocessor component in the library of coprocessor components; providing a library of programmable coprocessors and a netlist representation of each programmable coprocessor in the library of programmable coprocessors comprised of the library of coprocessor components, wherein each programmable coprocessor of the library of programmable coprocessors has a uniform and predetermined architectural style; extracting the functionality of each programmable coprocessor from the netlist representation; providing a software application; and mapping the software application to a product, which product comprises a host microprocessor, at least one programmable coprocessor from the library of programmable coprocessors, and a software program, wherein the software program is: executable on the host microprocessor; programs the at least one programmable coprocessor from the library of programmable coprocessors to perform a function; executes a portion of the software application on the host microprocessor; and dispatches a portion of the software application to one or more of the at least one programmable coprocessor.
Claim 3
Dependent Claim
97 words
The method of claim 1, wherein the step of mapping a software application to a product includes the steps of: providing an architecture driven software compiler; transmitting the description of each coprocessor component of the library of coprocessor components to the architecture driven software compiler; transmitting the netlist representation of the at least one programmable coprocessor of the library of programmable coprocessors to the architecture driven software compiler; providing an application software code for the architecture driven software compiler; and generating the software program which is executable on the host microprocessor using the architecture driven software compiler.
Claim 4
Dependent Claim
22 words
The method of claim 2, wherein the step of providing an application software code includes providing a high level software application code.
Claim 5
Dependent Claim
171 words
The method of claim 2, wherein the step of generating the software program which is executable on the host microprocessor includes the steps of: parallelizing at least one portion of the application software code, wherein the step of parallelizing comprises the steps of: generating a host microprocessor code from the at least one portion of the application software code that is parallelized; generating a coprocessor code from the at least one portion of the application software code that is parallelized; using the host microprocessor code to determine an execution speed of the host microprocessor; using the coprocessor code to determine an execution speed of the at least one programmable coprocessor; selecting one of the host microprocessor or the at least one programmable coprocessor for execution of the at least one portion of the application software code that is parallelized, wherein the one of the host microprocessor or the at least one programmable coprocessor is selected in accordance with their execution speeds; and creating a code which serves as the software program.
Claim 6
Dependent Claim
175 words
The method of claim 1, further including the steps of: allocating a first plurality of programmable coprocessors from the library of programmable coprocessors; providing a netlist representation of the first plurality of programmable coprocessors from the library of programmable coprocessors; providing an acceptance index for the software program which is executable on the host microprocessor; providing an architecture driven software compiler; transmitting the description of each coprocessor component of the library of coprocessor components to the architecture driven software compiler; transmitting the netlist representation of the first plurality of programmable coprocessors from the library of programmable coprocessors to the architecture driven software compiler; providing an application software code for the architecture driven software compiler; determining a first performance index, the first performance index for first plurality of programmable coprocessors from the library of programmable coprocessors; comparing the first performance index with the acceptance index and generating a first comparison result; and generating the software program which is executable on the host microprocessor using the architecture driven software compiler in accordance with the first comparison result.
Claim 7
Dependent Claim
125 words
The method of claim 5, further including the steps of: allocating a second plurality of programmable coprocessors from the library of programmable coprocessors; providing a netlist representation of the second plurality of programmable coprocessors from the library of programmable coprocessors; transmitting the netlist representation of the second plurality of programmable coprocessors from the library of programmable coprocessors to the architecture driven software compiler; determining a second performance index, the second performance index for the second plurality of programmable coprocessors from the library of programmable coprocessors; comparing the second performance index with the acceptance index and generating a second comparison result; and generating the software program which is executable on the host microprocessor using the architecture driven software compiler in accordance with the second comparison result.
Claim 8
Dependent Claim
26 words
The method of claim 1, wherein the software program controls execution of the dispatched portion of the software application on the at least one programmable coprocessor.
Claim 9
Independent Claim
185 words
A method for designing a portion of a computing system, comprising the steps of: providing a host microprocessor; providing a plurality of programmable coprocessors and a netlist representation for each programmable coprocessor of the plurality of programmable coprocessors, wherein each programmable coprocessor of the plurality of programmable coprocessors has a predetermined architectural style; providing a plurality of building blocks for the plurality of programmable coprocessors and a description for each of the plurality of building blocks for the plurality of programmable coprocessors; extracting the functionality of each programmable coprocessor from the netlist representation; allocating a first set of programmable coprocessors from the plurality of programmable coprocessors; providing a software application code; compiling the software application code with the host microprocessor and the first set of programmable coprocessors; and generating a first software program, wherein the first software program: is executable on the host microprocessor; programs at least one of the first set of programmable coprocessors; executes a portion of the software application on the host microprocessor; and dispatches a portion of the software application to at least one of the first set of programmable coprocessors.
Claim 10
Independent Claim
185 words
A method for designing a portion of a computing system, comprising the steps of: providing a host microprocessor; providing a plurality of programmable coprocessors and a netlist representation for each programmable coprocessor of the plurality of programmable coprocessors, wherein each programmable coprocessor of the plurality of programmable coprocessors has a predetermined architectural style; providing a plurality of building blocks for the plurality of programmable coprocessors and a description for each of the plurality of building blocks for the plurality of programmable coprocessors; extracting the functionality of each programmable coprocessor from the netlist representation; allocating a first set of programmable coprocessors from the plurality of programmable coprocessors; providing a software application code; compiling the software application code with the host microprocessor and the first set of programmable coprocessors; and generating a first software program, wherein the first software program: is executable on the host microprocessor; programs at least one of the first set of programmable coprocessors; executes a portion of the software application on the host microprocessor; and dispatches a portion of the software application to at least one of the first set of programmable coprocessors.
Claim 11
Dependent Claim
37 words
The method of claim 8, wherein the step of providing a plurality of programmable coprocessors includes providing each of the plurality of programmable coprocessors with a sequencer and a programmable interconnection network as the predetermined architectural style.
Claim 12
Dependent Claim
69 words
The method of claim 8, wherein the step of compiling the software application code includes: transmitting a netlist representation for the first set of programmable coprocessors to a compiler; transmitting a description for the plurality of building blocks of the first set of programmable coprocessors to the compiler; and using the compiler to generate the first software program, where the first software program is executable on the host microprocessor.
Claim 13
Dependent Claim
144 words
The method of claim 8, wherein the step of compiling the software application code with the host microprocessor and the set of programmable coprocessors includes: generating a first host microprocessor programming code from a portion of the software application code; generating a first programmable coprocessor programming code from the portion of the software application code; determining an amount of time the host microprocessor uses to run the first host microprocessor programming code; determining an amount of time the first set of programmable coprocessors uses to run the first programmable coprocessor programming code; and selecting one of the host microprocessor or the first set of programmable coprocessors in accordance with the amount of time the host microprocessor uses to run the first host microprocessor programming code and the amount of time the set of programmable coprocessors uses to run the first programmable coprocessor programming code.
Claim 14
Dependent Claim
82 words
The method of claim 11, wherein the step of selecting one of the host microprocessor or the set of programmable coprocessors includes comparing the amount of time the host microprocessor uses to run the first host microprocessor programming code with the amount of time the set of programmable coprocessors uses to run the first programmable coprocessor programming code and selecting the one of the host microprocessor or the set of programmable coprocessors in accordance with a lessor of the amount of time.
Claim 15
Dependent Claim
102 words
The method of claim 11, further including the steps of: providing an acceptance index; generating a first performance index during the step of creating a first software program that is executable on the host microprocessor; comparing the first performance index with the acceptance index; and when the first performance index is less than the acceptance index performing the steps of: allocating a second set of programmable coprocessors from the plurality of programmable coprocessors; compiling the software application code with the host microprocessor and the second set of programmable coprocessors; and creating a second software program that is executable on the host microprocessor.
Claim 16
Dependent Claim
146 words
The method of claim 11, wherein the step of compiling the software application code with the host microprocessor and the second set of programmable coprocessors includes: generating a second host microprocessor programming code from a portion of the software application code; generating a second programmable coprocessor programming code from the portion of the software application code; determining an amount of time the host microprocessor uses to run the second host microprocessor programming code; determining an amount of time the second set of programmable coprocessors uses to run the second programmable coprocessor programming code; and selecting one of the host microprocessor or the second set of programmable coprocessors in accordance with the amount of time the host microprocessor uses to run the second host microprocessor programming code and the amount of time the second set of programmable coprocessors uses to run the second programmable coprocessor programming code.
Claim 17
Dependent Claim
176 words
The method of claim 14, wherein the step of selecting one of the host microprocessor or the second set of programmable coprocessors includes the steps of: providing an acceptance index; comparing the amount of time the host microprocessor uses to run the second host microprocessor programming code with the amount of time the set of programmable coprocessors uses to run the second programmable coprocessor programming code; selecting the one of the host microprocessor or the second set of programmable coprocessors in accordance with a lessor of the amount of time; generating a second performance index during the step of creating a second software program that is executable on the host microprocessor; comparing the second performance index with the acceptance index; and when the second performance index is less than the acceptance index performing the steps of: allocating another set of programmable coprocessors from the plurality of programmable coprocessors; compiling the software application code with the host microprocessor and the another set of programmable coprocessors; and creating another software program that is executable on the host microprocessor.
Claim 18
Dependent Claim
57 words
The method of claim 8, wherein the step of generating a software program includes the steps of: downloading a microcode to the first set of programmable coprocessors; starting the first set of programmable coprocessors to execute the microcode; transferring data to the first set of programmable coprocessors; and receiving results from the first set of programmable coprocessors.
Claim 19
Dependent Claim
171 words
A computing system, comprising: a host microprocessor; a plurality of programmable coprocessors and a netlist representation for each of the plurality of programmable coprocessors, wherein each programmable coprocessor of the plurality of programmable coprocessors has a similar architectural style; a plurality of building blocks for the plurality of programmable coprocessors and a description of each building block of the plurality of building blocks; a software application program; and a compiler capable of extracting the functionality of each programmable coprocessor from the netlist representation and compiling the software application program, the netlist representation for each programmable coprocessor of the plurality of programmable coprocessors, and the description of the plurality of building blocks and creating a software program, wherein the software program is: executable on the host microprocessor; programs at least one programmable coprocessor from the plurality of programmable coprocessors to perform a function; executes a portion of the software application on the host microprocessor: and dispatches a portion of the software application to one or more of the plurality of programmable coprocessors.
Claim 20
Dependent Claim
171 words
A computing system, comprising: a host microprocessor; a plurality of programmable coprocessors and a netlist representation for each of the plurality of programmable coprocessors, wherein each programmable coprocessor of the plurality of programmable coprocessors has a similar architectural style; a plurality of building blocks for the plurality of programmable coprocessors and a description of each building block of the plurality of building blocks; a software application program; and a compiler capable of extracting the functionality of each programmable coprocessor from the netlist representation and compiling the software application program, the netlist representation for each programmable coprocessor of the plurality of programmable coprocessors, and the description of the plurality of building blocks and creating a software program, wherein the software program is: executable on the host microprocessor; programs at least one programmable coprocessor from the plurality of programmable coprocessors to perform a function; executes a portion of the software application on the host microprocessor: and dispatches a portion of the software application to one or more of the plurality of programmable coprocessors.
Claim 21
Dependent Claim
11 words
The computing system of claim 17, further including an acceptance index.
Claim 22
Dependent Claim
37 words
The computing system of claim 17, wherein the plurality of building blocks includes elements selected from the group consisting of multiplexers, registers, register files, bus drivers, arithmetic logic units, sequencers, random access memories, and read only memories.
Claim 23
Dependent Claim
29 words
The computing system of claim 17, wherein the software application program is written in a programming language from the group consisting of C, C ++ , ADA, and Pascal.
Claim 24
Dependent Claim
24 words
The computing system of claim 17, wherein each programmable coprocessor of the plurality of programmable coprocessors comprises a sequencer and a programmable interconnection network.
References Cited (Backward Citations)
US5197016A
Cited
US5005136A
Cited
US5301318A
Cited
US5287511A
Cited
US5524244A
Cited
US5377122A
Cited
US5535393A
Cited
US5491640A
Cited
US5416719A
Cited
US5551013A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-09-28 | 2002-03-30 | 2002-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-28 | 2006-03-30 | 2006-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-28 | 2010-03-30 | 2010-09-29 | $7700.00 | Window Closed / Lapsed |