Receive processor device for use in a digital mobile radio systems

Claim 2

A receive processor device for use in a digital mobile radio system, the device including: a processor chain comprising a set of units connected in cascade, one or more of said units being decision units, each of said decision units making decisions as to the value of information symbols received by said each decision unit; means for bypassing one of said decision units and for deleting the value of information symbols to be processed by a succeeding unit connected in cascade with said one of said decision units, if the transmission quality of information symbols received by said one of said decision units is poor; and means for determining probable values for information symbols deleted by said means for bypassing, based on said deleted information symbols and based on information symbols not deleted by said means for bypassing.

Claim 3

The receive processor device according to claim 1 wherein said one of said decision units is an equalizer.

Claim 4

The receive processor device according to claim 1 wherein said one of said decision units comprises a channel decoder.

Claim 5

The receive processor device according to claim 1 wherein said one of said decision units is one decoder stage of a channel decoder means which includes a plurality of stages each using one of a plurality of concatenated codes used at a transmitter from which said information signals originate.

Claim 6

The receive processor device according to claim 1 wherein said means for bypassing is connected in parallel with said one of said decision units by means of two switches; whereby said one of said decision units is bypassed if said transmission quality is poor, or said means for bypassing is bypassed otherwise.

Claim 7

A receive processor device for use in a digital mobile radio system, the device including: a processor chain comprising a set of units connected in cascade, one or more of said units being decision units, each of said decision units making decisions as to the value of information symbols received by that decision unit; means for bypassing one of said decision units if the transmission quality of information symbols received by said decision unit is poor; means for deleting the value of information symbols to be processed by a succeeding unit connected in cascade with said one of said decision units if the transmission quality of information symbols received by said one of said decision units is poor, said means for deleting being connected in series with said decision unit; means for determining probable values for information symbols deleted by said means for deleting, based on said deleted information symbols and based on information symbols not deleted by said means for deleting; and means for bypassing said means for deleting, if said transmission quality is not poor.

Claim 8

A receive processor device for use in a digital mobile radio system, the device including: a processor chain comprising a set of units connected in cascade, one or more of said units being decision units, each of said decision units making decisions as to the value of information symbols received by that decision unit; means for bypassing one of said decision units if the transmission quality of information symbols received by said decision unit is poor; means for deleting the value of information symbols to be processed by a succeeding unit connected in cascade with said one of said decision units if the transmission quality of information symbols received by said one of said decision units is poor, said means for deleting being connected in series with said decision unit; means for determining probable values for information symbols deleted by said means for deleting, based on said deleted information symbols and based on information symbols not deleted by said means for deleting; and means for bypassing said means for deleting, if said transmission quality is not poor.

Claim 9

The receive processor device according to claim 1 wherein said one of said decision units supplies, for each information symbol received, one of a plurality of meaningful logic levels for representing the digital information transmitted by said each information symbol, and wherein said means for bypassing includes means for replacing an information symbol with a non-meaningful logic level recognizable as such by said succeeding unit.

Claim 10

The receive processor device according to claim 1 wherein said one of said decision units is adapted to supply, for each symbol received, a decision quality indicator corresponding to the decision made by that decision unit, and wherein said means for bypassing includes means for replacing an information symbol with a decision quality indicator that indicates poor decision quality.

Claim 11

The receive processor device according to claim 2 wherein said succeeding unit is a decision unit comprising a channel decoder means, and wherein said means for determining probable values for information symbols deleted by said means for bypassing includes: means for producing, from a coded word comprising a plurality of deleted symbols, a set of coded words applied in succession to said channel decoder means, said coded words corresponding to various possible combinations of symbols for said plurality of deleted symbols, means for memorizing, for each of said coded words, the corresponding decoded word output by the channel decoder means and a corresponding decoding quality indicator, and means for selecting the memorized decoded words for which the decoding quality indicator indicates the best decoding quality.

Claim 12

The receive processor device according to claim 2 wherein said succeeding functional unit is a channel decoder means and, wherein said means for determining probable values comprises said channel decoder means.

Claim 13

The receive processor device according to claim 4 wherein said succeeding unit is a decision unit comprising a subsequent decoder stage of said channel decoder means, and wherein said means for determining probable values for deleted symbols includes: means for producing, from a coded word comprising a plurality of deleted symbols, a set of coded words applied in succession to said next decoder stage, said coded words corresponding to different combinations of symbols for said plurality of deleted symbols, means for memorizing, for each of said coded words, the corresponding decoded word output by said next decoder stage and a corresponding decoding quality indicator, and means for selecting the memorized decoded words for which the decoding quality indicator indicates the best decoding quality.

Claim 14

The receive processor device according to claim 4 wherein said succeeding unit is a decision unit comprising a subsequent decoder stage of said channel decoder means, and wherein said means for determining probable values comprises said subsequent decoder stage.

Claim 15

The receive processor device according to claim 3 wherein said succeeding unit is a decision unit comprising a source decoder means, and wherein said means for determining probable values comprises means for interpolating blocks of symbols supplied to said source decoder means.

Claim 16

A receive processor device for use in a digital mobile radio system, the device including: a processor chain comprising a set of units connected in cascade, one or more of said units being decision units, each of said decision units making decisions as to the value of information symbols received by that decision unit; means for bypassing one of said decision units if the transmission quality of information symbols received by said one of said decision units is poor; means for deleting the value of information symbols to be processed by a succeeding unit connected in cascade with said one of said decision units if the transmission quality of information symbols received by said one of said decision units is poor; means for determining probable values for information symbols deleted by said means for deleting, based on said deleted information symbols and based on information symbols not deleted by said means for deleting; and means for bypassing said one of said decision units if said transmission quality of information symbols received by said one of said decision units is good and for not bypassing said one of said decision units if said transmission quality of information symbols is average.

Claim 17

A receive processor device for use in a digital mobile radio system, the device including: a processor chain comprising a set of units connected in cascade, one or more of said units being decision units, each of said decision units making decisions as to the value of information symbols received by that decision unit; means for bypassing one of said decision units if the transmission quality of information symbols received by said one of said decision units is poor; means for deleting the value of information symbols to be processed by a succeeding unit connected in cascade with said one of said decision units if the transmission quality of information symbols received by said one of said decision units is poor; means for determining probable values for information symbols deleted by said means for deleting, based on said deleted information symbols and based on information symbols not deleted by said means for deleting; and means for bypassing said one of said decision units if said transmission quality of information symbols received by said one of said decision units is good and for not bypassing said one of said decision units if said transmission quality of information symbols is average.

Claim 18

The receive processor device according to claim 1 further including means for deactivating said one of said decision units when it has been bypassed.