Circuit configuration for detecting a load current of a power semiconductor component with a source-side load

Claim 1

A circuit assembly, comprising: a field-effect-controllable power semiconductor component having a drain terminal, a source terminal, a gate terminal, a drain-to-source voltage and a load current; and a circuit configuration for detecting the load current of said field-effect-controllable power semiconductor component, said circuit configuration including: a further field-effect-controllable semiconductor component through which a fraction of the load current flows, said further field-effect-controllable semiconductor component having a drain terminal connected to the drain terminal of said field-effect-controllable power semiconductor component, a gate terminal connected to the gate terminal of said field-effect-controllable power semiconductor component, a source terminal and a drain-to-source voltage, a fixed potential terminal, one resistor at which a voltage proportional to the load current can be picked up, said one resistor being connected to said fixed potential terminal, and a controllable resistor connected between said one resistor and the source terminal of said further field-effect-controllable semiconductor component, said controllable resistor adjusting the current of said further field-effect-controllable semiconductor component for setting the drain-to-source voltages of said field-effect-controllable power semiconductor component and said further field-effect-controllable semiconductor component equal to one another, a differential amplifier having a first input connected to the source terminal of said field-effect-controllable power semiconductor component, a second input connected to the source terminal of said further field-effect-controllable semiconductor component and an output, said controllable resistor being a MOSFET having a control input connected to the output of said differential amplifier, and a further differential amplifier having a first input connected to the source terminal of said field-effect-controllable power semiconductor component and a second input receiving a voltage being greater than an offset voltage of said differential amplifier connected to said controllable resistor.