US4910455A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Non-intrusive current measuring circuit
Assignee: STMicroelectronics SA
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Filing: 1989-03-06
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Granted: 1990-03-20
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Expires: 2009-03-06
Abstract
Abstract A current measuring circuit for an integrated circuit comprises an operational amplifier (22), the non-inverting input terminal of which is grounded through a first resistor (23) having a value R B and a second resistor (21) having a value R 2 , the junction of those two resistors receiving the current (I NL ) to be measured, and the output of which is connected by an inverter (26) to a MOS transistor (27). The biasing voltage of the operational amplifier and the characteristics of the inverter are chosen so that the MOS transistor is biased at its threshold in the absence of a current to be measured, whereby the output voltage V s is correlated with the current to be measured by a linear relation independent of the temperature.
Inventors
- 👤 Bruno Nadd
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-25 22:35
CPC Classifications
G; G01; G01R; G01R19/00; G01R19/145; G01R19/15; G01R19/32
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
254 words
A current measuring circuit for an integrated circuit, comprising: an operational amplifier (22) the inverting input terminal of which is grounded through a first resistor (23) having a value R B and a second resistor (21) having a value R 2 , the junction of said two resistors receiving the current (I NL ) to be measured, the non-inverting input of which is biased by a dividing bridge comprising a third resistor (24) having a value R A and a fourth resistor (25) having a value R B connected between a supply voltage and the ground, the output of which is connected to the input of an inverter (26), a MOS transistor (27) the gate of which is connected to the inverter output, the drain of which is connected to the supply voltage through a fifth resistor (29) having a value R 1 and to the first input of the operational amplifier through a sixth resistor (30) having a value R A , the source of which is grounded through a measurement resistor having a value Rs, the second and fifth resistors having low values with respect to the first, third, fourth and sixth resistors, the biasing voltage of the operational amplifier and the characteristics of the inverter being chosen so that the MOS transistor is biased at its threshold in the absence of a current to be measured, whereby the output voltage is correlated with the current to be measured by the linear relation: Vs=[(1-K)/K][R.sub.2 /R.sub.1 ][I.sub.NL R.sub.s ] where K=R.sub.B /(R.sub.A +R.sub.B).
Claim 2
Dependent Claim
254 words
A current measuring circuit for an integrated circuit, comprising: an operational amplifier (22) the inverting input terminal of which is grounded through a first resistor (23) having a value R B and a second resistor (21) having a value R 2 , the junction of said two resistors receiving the current (I NL ) to be measured, the non-inverting input of which is biased by a dividing bridge comprising a third resistor (24) having a value R A and a fourth resistor (25) having a value R B connected between a supply voltage and the ground, the output of which is connected to the input of an inverter (26), a MOS transistor (27) the gate of which is connected to the inverter output, the drain of which is connected to the supply voltage through a fifth resistor (29) having a value R 1 and to the first input of the operational amplifier through a sixth resistor (30) having a value R A , the source of which is grounded through a measurement resistor having a value Rs, the second and fifth resistors having low values with respect to the first, third, fourth and sixth resistors, the biasing voltage of the operational amplifier and the characteristics of the inverter being chosen so that the MOS transistor is biased at its threshold in the absence of a current to be measured, whereby the output voltage is correlated with the current to be measured by the linear relation: Vs=[(1-K)/K][R.sub.2 /R.sub.1 ][I.sub.NL R.sub.s ] where K=R.sub.B /(R.sub.A +R.sub.B).
Claim 3
Dependent Claim
44 words
A current measuring circuit according to claim 1, wherein the resistors having a high value are realized by means of depletion MOS transistors, the sources of which are connected to their gate and wherein the low value resistors are constituted by polycrystalline silicon resistors.
Claim 4
Dependent Claim
21 words
A current measuring circuit according to claim 1, wherein the measuring resistor (R s ) is external to the integrated circuit.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1993-03-19 | 1993-09-18 | 1994-03-20 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1997-03-19 | 1997-09-18 | 1998-03-20 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2001-03-19 | 2001-09-18 | 2002-03-20 | $7700.00 | Window Closed / Lapsed |