Patent US5814835A successfully refreshed from Google Patents.
US5814835A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device and method for fabricating the same
Assignee: Sharp Corp
•
Filing: 1995-11-16
•
Granted: 1998-09-29
•
Expires: 2015-11-16
Abstract
Abstract The semiconductor device of invention includes: a substrate having an insulating surface; and an element region formed by crystallizing an amorphous silicon film, the element region being provided on the insulating surface of the substrate. In the semiconductor device, the element region is constituted by a laterally crystallized region formed by crystallizing the amorphous silicon film from a linearly crystallized region crystallized by a selective introduction of catalyst elements for promoting a crystallization of the amorphous silicon film to a region surrounding the linearly crystallized region by performing a heat-treatment, and a concentration of the catalyst elements in at least one of the laterally crystallized region and the linearly crystallized region is controlled by a line width of an introduction setting region having a linear planar pattern, the line width being set so as to selectively introduce the catalyst elements.
Inventors
- 👤 Naoki Makita
- 👤 Tadayoshi Miyamoto
- 👤 Tsukasa Shibuya
- 👤 Masashi Maekawa
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 09:47
CPC Classifications
H; H10; H10P; H10P14/00; H10P14/20; H10P14/38; H10P14/3802; H10P14/3808; H10P14/3814; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0314; H10D30/0321; H10D30/60; H10D30/67; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6744; H10D86/00; H10D86/01; H10D86/021; H10D86/0221; H10D86/0223; H10D86/0225; H10D86/40; H10D86/60; H10P14/29; H10P14/2901; H10P14/2922; H10P14/32; H10P14/3202; H10P14/3238; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411; H10P14/3806; H10P14/3816; H10P14/382
Claims Analysis
Total Claims: 10
Claim 1
Independent Claim
136 words
A semiconductor device comprising: a substrate having an insulating surface; and an element region formed by crystallizing an amorphous silicon film, the element region being provided on the insulating surface of the substrate, wherein the element region is constituted by a laterally crystallized region formed by crystallizing the amorphous silicon film from a linearly crystallized region crystallized by a selective introduction of catalyst elements for promoting a crystallization of the amorphous silicon film to a region surrounding the linearly crystallized region by performing a heat-treatment, and wherein a concentration of the catalyst elements in at least one of the laterally crystallized region and the linearly crystallized region is controlled by a line width of an introduction setting region having a linear planar pattern, the line width being set so as to selectively introduce the catalyst elements.
Claim 2
Dependent Claim
136 words
A semiconductor device comprising: a substrate having an insulating surface; and an element region formed by crystallizing an amorphous silicon film, the element region being provided on the insulating surface of the substrate, wherein the element region is constituted by a laterally crystallized region formed by crystallizing the amorphous silicon film from a linearly crystallized region crystallized by a selective introduction of catalyst elements for promoting a crystallization of the amorphous silicon film to a region surrounding the linearly crystallized region by performing a heat-treatment, and wherein a concentration of the catalyst elements in at least one of the laterally crystallized region and the linearly crystallized region is controlled by a line width of an introduction setting region having a linear planar pattern, the line width being set so as to selectively introduce the catalyst elements.
Claim 3
Dependent Claim
31 words
A semiconductor device according to claim 1, wherein the element region comprises at least a part of the laterally crystallized region and at least a part of the linearly crystallized region.
Claim 4
Dependent Claim
71 words
A semiconductor device according to claim 1, wherein the line width of the introduction setting region having the linear planar pattern is selected so that concentration of the catalyst elements in the linearly crystallized region is no more than a concentration at which a damage caused by an etching process for the element region is substantially prevented in the linearly crystallized region, an underlying layer under the region, or the substrate.
Claim 5
Dependent Claim
27 words
A semiconductor device according to claim 1, wherein the line width of the introduction setting region having the linear planar pattern is about 20 μm or less.
Claim 6
Dependent Claim
27 words
A semiconductor device according to claim 1, wherein the line width of the introduction setting region having the linear planar pattern is about 10 μm or less.
Claim 7
Dependent Claim
63 words
A semiconductor device according to claim 2, wherein at least a part of the linearly crystallized region is used as at least a part of a contact region between an element and lines in the element region, and wherein at least a part of the laterally crystallized region is used as an active region defining characteristics of the element in the element region.
Claim 8
Dependent Claim
45 words
A semiconductor device according to claim 1, wherein at least one element selected from the group consisting of Ni, Co, Pd, Pt, Cu, Ag, Au, In, Sn, Al and Sb is used as the catalyst elements for promoting the crystallization of the amorphous silicon film.
Claim 9
Dependent Claim
30 words
A semiconductor device according to claim 1, wherein the concentration of the catalyst elements in the introduction setting region of the film is lower than 1×10 17 atoms/cm 3 .
Claim 10
Dependent Claim
42 words
A semiconductor device according to claim 1, wherein a ratio of the concentration of the catalyst element in the introduction setting region to the concentration of the at least one of the laterally crystallized region is less than one order of magnitude.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-09-28 | 2002-03-30 | 2002-09-29 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-09-28 | 2006-03-30 | 2006-09-29 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-09-28 | 2010-03-30 | 2010-09-29 | $7700.00 | Window Closed / Lapsed |