US5805602A — Network monitoring system for cell delay variation

Claim 1

Independent Claim 135 words

An apparatus for minimizing jitter caused during transmission of a data packet stream, comprising: a time stamp detector detecting time stamp values within said data packet stream, each time stamp value representing an expected arrival time of a corresponding data packet stream segment; a timing circuit, responsive to a clock signal, for determining an actual arrival time for each said corresponding data packet stream segment; a detecting circuit detecting jitter in each data packet stream segment by executing a correlation of the corresponding expected arrival time and the corresponding actual arrival time with an accumulation of expected and actual arrival times of previously-received data packet stream segments; and a data packet stream correction circuit outputting said data packet stream as a corrected data packet stream having time stamp values adjusted in response to said correlation.

Claim 2

Independent Claim 135 words

An apparatus for minimizing jitter caused during transmission of a data packet stream, comprising: a time stamp detector detecting time stamp values within said data packet stream, each time stamp value representing an expected arrival time of a corresponding data packet stream segment; a timing circuit, responsive to a clock signal, for determining an actual arrival time for each said corresponding data packet stream segment; a detecting circuit detecting jitter in each data packet stream segment by executing a correlation of the corresponding expected arrival time and the corresponding actual arrival time with an accumulation of expected and actual arrival times of previously-received data packet stream segments; and a data packet stream correction circuit outputting said data packet stream as a corrected data packet stream having time stamp values adjusted in response to said correlation.

Claim 3

Dependent Claim 33 words

An apparatus as in claim 1, wherein said data packet stream correction circuit comprises a timing restamp module replacing said time stamp values with corrected time stamp values in accordance with said correlation.

Claim 4

Dependent Claim 23 words

An apparatus as in claim 2, wherein said data packet stream correction circuit further comprises a buffer circuit receiving said time stamp values.

Claim 5

Dependent Claim 21 words

An apparatus as in claim 3, wherein said buffer circuit has an output data rate controlled in response to said correlation.

Claim 6

Dependent Claim 26 words

An apparatus as in claim 3, wherein said buffer circuit selectively adjusts a spacing between packets in said data packet stream in accordance with said correlation.

Claim 7

Dependent Claim 16 words

An apparatus as in claim 3, further comprising an independent clock source outputting said clock signal.

Claim 8

Dependent Claim 42 words

An apparatus as in claim 1, wherein said data packet stream is received in MPEG format, said time stamp detector detecting said time stamp values as program clock reference (PCR) values from an MPEG stream having a selected program identifier (PID) value.

Claim 9

Dependent Claim 27 words

An apparatus as in claim 7, wherein said data packet stream correction circuit comprises a buffer circuit receiving said MPEG stream for adjusting said time stamp values.

Claim 10

Dependent Claim 21 words

An apparatus as in claim 8, wherein said buffer circuit has an output data rate controlled in response to said correlation.

Claim 11

Dependent Claim 25 words

An apparatus as in claim 8, wherein said buffer circuit selectively adjusts a spacing between packets in said MPEG stream in accordance with said correlation.

Claim 12

Dependent Claim 26 words

An apparatus as in claim 8, wherein said buffer circuit adjusts said time stamp values in accordance with said corresponding correlation and a buffer fullness ratio.

Claim 13

Dependent Claim 36 words

An apparatus as in claim 8, wherein said data packet stream correction circuit further comprises a timing restamp module replacing said PCR values in said MPEG stream with corrected PCR values in accordance with said correlation.

Claim 14

Dependent Claim 36 words

An apparatus as recited in claim 7, wherein said data packet stream correction circuit comprises a timing restamp module replacing said PCR values in said MPEG stream with corrected PCR values in accordance with said correlation.

Claim 15

Dependent Claim 37 words

An apparatus as in claim 1, wherein said detecting circuit comprises a least square error calculator for calculating a least square error from the expected and actual arrival times of said previously received data packet stream segments.

Claim 16

Dependent Claim 45 words

An apparatus as in claim 14, wherein said detecting circuit further comprises a jitter calculator calculating said detected jitter in response to said actual arrival time and a desired actual arrival time generated in response to said expected arrival time and the least squared error.

Claim 17

Dependent Claim 37 words

An apparatus as in claim 14, wherein said detecting circuit further comprises a restamp calculation circuit outputting a restamp value to said timing restamp module in response to said expected arrival time and the least square error.

Claim 18

Dependent Claim 19 words

An apparatus as recited in claim 1, said timing circuit comprising an independent clock source generating said clock signal.

Claim 19

Dependent Claim 29 words

An apparatus as recited in claim 1, further comprising an ATM input processor outputting said data packet stream from an ATM cell stream having a selected virtual path identifier.

Claim 20

Dependent Claim 25 words

An apparatus as recited in claim 18, further comprising an ATM output processor outputting a second ATM cell stream carrying said corrected data packet stream.

Claim 21

Dependent Claim 63 words

An apparatus as recited in claim 1, further comprising a data interface for supplying the calculated jitter to a control center managing operations of a network transporting said data packet stream, and for supplying a correction signal from said control center to said data packet stream correction circuit, the correction circuit outputting said corrected data packet stream in response to said correction signal.

Claim 22

Independent Claim 100 words

A method for measuring jitter in a transport stream of MPEG-encoded data packets, comprising the steps of: detecting program clock reference (PCR) values from the transport stream, each PCR value identifying an expected arrival time of a corresponding portion of said transport stream; identifying an actual arrival time for each said portion of said transport stream in accordance with a clock signal independent from the transport stream; and calculating said jitter based on a correlation of the corresponding expected and actual arrival times with an accumulation of respective expected and actual arrival times of prior portions of the transport stream.

Claim 23

Independent Claim 100 words

A method for measuring jitter in a transport stream of MPEG-encoded data packets, comprising the steps of: detecting program clock reference (PCR) values from the transport stream, each PCR value identifying an expected arrival time of a corresponding portion of said transport stream; identifying an actual arrival time for each said portion of said transport stream in accordance with a clock signal independent from the transport stream; and calculating said jitter based on a correlation of the corresponding expected and actual arrival times with an accumulation of respective expected and actual arrival times of prior portions of the transport stream.

Claim 24

Dependent Claim 42 words

The method of claim 21, further comprising the steps of: receiving said MPEG-encoded data packets from an asynchronous transfer mode (ATM) stream of cells; and selecting at least one of said MPEG streams in accordance with a selected program identifier (PID) value.

Claim 25

Dependent Claim 82 words

The method of claim 21, wherein said calculating step comprises: calculating a least square error of the accumulation of respective expected and actual arrival times of prior portions of the transport stream; determining a desired actual arrival time in response to the expected arrival time for said each portion of the transport stream and the least square error; and comparing the desired actual arrival time with the actual arrival time for said each portion of the transport stream to determine said jitter.

Claim 26

Dependent Claim 25 words

The method of claim 23, further comprising correcting the jitter in response to a comparison between the expected arrival time and the least square error.

Claim 27

Dependent Claim 43 words

The method of claim 21, wherein the detecting, identifying, and calculating steps each are executed at a network node, the calculating further comprising supplying the calculated jitter from the node to a control center managing operations of a network transporting the transport stream.

Claim 28

Dependent Claim 20 words

The method of claim 25, further comprising correcting said jitter in response to a correction signal from the control center.

Claim 29

Dependent Claim 28 words

The method of claim 25, further comprising performing network operations at the network control center to control transport of the transport stream in response to the calculated jitter.

Claim 30

Dependent Claim 23 words

The method as in claim 27, wherein said step of performing network operations comprises the step of routing traffic from the network node.

Claim 31

Dependent Claim 34 words

A method as in claim 27, wherein said step of performing network operations further comprises the step of initiating a service request in a work force management system portion of the operational support system.

Claim 32

Dependent Claim 33 words

A method as in claim 27, wherein said step of performing network operations comprises the step of initiating a service request in a work force management system portion of the operational support system.

Claim 33

Dependent Claim 28 words

A method as in claim 27, wherein said step of performing network operations comprises the step of initiating a request for creation of new capacity for the network.

Claim 34

Dependent Claim 49 words

A method as in claim 27, wherein said step of performing network operations comprises the steps of: outputting a jitter correction control signal to the network node in response to the detected jitter; and correcting the jitter at the network node in response to the jitter correction control signal.

Claim 35

Independent Claim 141 words

A system for monitoring jitter in a packet switched network, comprising: a plurality of monitors each comprising: (a) a packet demultiplexer selecting a data packet stream from the packet switched network and outputting a digital data stream from the selected data packet stream; (b) a time stamp detector detecting time stamp values located within said digital data stream and representing an expected arrival time of a corresponding digital data stream segment, (c) a timing circuit, responsive to a clock signal, determining an actual arrival time for each said corresponding digital data stream segment, and (d) a detecting circuit for calculating a jitter value for each digital data stream segment on the basis of the corresponding expected and actual arrival times; and an operational support system receiving said detected jitter values from the monitors and managing operations of the packet switched network.

Claim 36

Independent Claim 141 words

A system for monitoring jitter in a packet switched network, comprising: a plurality of monitors each comprising: (a) a packet demultiplexer selecting a data packet stream from the packet switched network and outputting a digital data stream from the selected data packet stream; (b) a time stamp detector detecting time stamp values located within said digital data stream and representing an expected arrival time of a corresponding digital data stream segment, (c) a timing circuit, responsive to a clock signal, determining an actual arrival time for each said corresponding digital data stream segment, and (d) a detecting circuit for calculating a jitter value for each digital data stream segment on the basis of the corresponding expected and actual arrival times; and an operational support system receiving said detected jitter values from the monitors and managing operations of the packet switched network.

Claim 37

Dependent Claim 84 words

A system as in claim 33, wherein: said operational support system outputs at least one correction signal in response to the detected jitter values, and each of said monitors further comprises a data stream correction circuit, responsive to the at least one correction signal, receiving the digital data stream and outputting a corrected digital data stream having time stamps identifying an expected arrival time substantially coinciding with an actual arrival time of each corresponding digital data stream segment of said corrected digital data stream.

Claim 38

Dependent Claim 60 words

A system as in claim 34, wherein said data stream correction circuit comprises a timing restamp module replacing said time stamps with corrected time stamps in accordance with said detected jitter, and a buffer circuit receiving said digital data stream for adjusting said actual arrival time of each said corresponding digital data stream segment in accordance with said detected jitter.

Claim 39

Dependent Claim 22 words

A system as in claim 35, wherein said buffer circuit has an output data rate controlled in response to said detected jitter.

Claim 40

Dependent Claim 27 words

A system as in claim 35, wherein said buffer circuit selectively adjusts a spacing between packets in said digital data stream in accordance with said detected jitter.

Claim 41

Dependent Claim 16 words

A system as in claim 35, further comprising an independent clock source outputting said clock signal.

Claim 42

Dependent Claim 46 words

A system as in claim 33, wherein said digital data stream is output from said packet demultiplexer in MPEG format, said time stamp detector detecting said. time stamp values as program clock reference (PCR) values from an MPEG stream having a selected program identifier (PID) value.

Claim 43

Dependent Claim 51 words

A system as in claim 39, wherein said monitors each further comprise a correction circuit having a buffer circuit that receives the corresponding MPEG stream and adjusts the actual time duration of each said corresponding digital data stream segment in accordance with a timing adjustment signal from the operational support system.

Claim 44

Dependent Claim 23 words

A system as in claim 40, wherein said buffer circuit has an output data rate controlled in response to said timing adjustment signal.

Claim 45

Dependent Claim 27 words

A system as in claim 40, wherein said buffer circuit selectively adjusts a spacing between packets in said MPEG stream in accordance with said timing adjustment signal.

Claim 46

Dependent Claim 26 words

A system as in claim 40, wherein said buffer circuit adjusts said time duration in accordance with said timing adjustment signal and a buffer fullness ratio.

Claim 47

Dependent Claim 35 words

A system as in claim 40, wherein said correction circuit further comprises a timing restamp module replacing said PCR values in said MPEG stream with corrected PCR values in accordance with said timing adjustment signal.

Claim 48

Dependent Claim 31 words

A system as in claim 33, wherein said packet demultiplexer comprises an ATM input processor outputting said digital data stream from an ATM cell stream having a selected virtual path identifier.

Claim 49

Dependent Claim 27 words

A system as in claim 45, said monitors each further comprising an ATM output processor outputting a second ATM cell stream carrying a corrected digital data stream.

Claim 50

Dependent Claim 23 words

A system as in claim 33, wherein the operations support system initiates corrective measures if said detected jitter values exceed a predetermined threshold.

Claim 51

Dependent Claim 29 words

A system as in claim 47, wherein the operational support system comprises a router that reroutes traffic in the packet switched network in response to the detected jitter values.

Claim 52

Dependent Claim 37 words

A system as in claim 47, wherein said corrective measures include at least one of rerouting network traffic, performing maintenance on one of a plurality of network nodes, and correcting the detected jitter at the one node.

Claim 53

Dependent Claim 88 words

A system as in claim 33, wherein the operations support system comprises: a routing processor assigning each of the data packet streams a virtual path through selected nodes of the packet switched network, the routing processor rerouting at least a portion of a group of data packet streams passing through one of said selected nodes in accordance with corresponding detected jitter values; and a network element management system for managing corrective action to be performed on said one selected node in accordance with said corresponding detected jitter values.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	2001-09-07	2002-03-09	2002-09-08	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2005-09-07	2006-03-09	2006-09-08	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2009-09-07	2010-03-09	2010-09-08	$7700.00	Window Closed / Lapsed

Network monitoring system for cell delay variation

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