Quasi-double balanced passive reflection FET mixer

Claim 1

A passive reflection mixer for mixing a radio-frequency (RF) signal with a local oscillator (LO) signal comprising: a first (Q1) and a second (Q2) FET transistor each having a gate and a drain and a source terminal, the first and second FET transistors having said gate terminals directly joined together and said source terminals directly joined together such that the first and second FET transistors are connected in series such that a current entering a drain terminal of said first FET exits said drain terminal of said second FET and a current entering a drain terminal of said second FET exits said drain terminal of said first FET; a local oscillator input circuit having an unbalanced input port for connecting to an external local oscillator signal source, and a first two terminal output port for communicating said local oscillator signal to said joined gates and said joined sources of said first and second FET transistors such that said first and second FET transistors are both either driven on and off at the same time in response to said externally applied local oscillator signal; a coupling network having first and second terminals of a primary port and third and fourth terminals of a secondary port, and comprising a transmission line balun having first and second transmission line components connected to divide the voltage of an incident traveling wave at said primary port equally between said first and second transmission line components, and to sum the currents of traveling waves generated by said first and second transmission line components to generate an exitant traveling wave signal at said secondary port; said Q1 and Q2 presenting a substantially higher impedance than the impedance of said transmission line components coupling said RF signal to said FET drains when said Q1 and Q2 are OFF, and said Q1 and Q2 presenting a substantially lower impedance than the impedance of said transmission line coupling said RF signal to said FET drains when said Q1 and Q2 are ON; said RF signal being substantially completely reflected by each said Q1 and Q2 with no phase shift by said OFF Q1 and Q2, and said signal being substantially completely reflected by each said Q1 and Q2 with 180° phase shift by said ON Q1 and Q2; a diplexer circuit having a first port for coupling to said coupling network secondary port, and including low-pass filter means for separating an intermediate frequency (IF) signal from said exitant traveling wave signal and having means for receiving a radio-frequency (RF) signal and communicating said signal to said first and second FETs; substantially all of said RF signal incident on said first and second FETs being reflected from said first and second FETs during ON and OFF FET conduction states such that commutation of said RF signal during each half cycle of said local oscillator signal is substantially symmetrical, and such that said RF reflected signal components in said reflected wave are substantially canceled from said exitant traveling wave to generate said intermediate-frequency (IF) signal; said coupling network first terminal being connected to said first FET transistor drain terminal, said coupling network second terminal being connected to said second FET transistor drain terminal, said third terminal being connected to a first terminal of said first diplexer port, and said fourth terminal being connected to a second terminal of said diplexer port; and a bias circuit coupleable to an external bias source for providing a direct current bias to the drains of said first and second FET transistors coupled to said coupling network so that a direct current circuit path is defined between said bias source, said coupling network, said FET transistor drain terminals, and said FET transistor source terminals.