FET mixer having transmission line transformer

Claim 2

A mixer comprising: a first and a second FET transistor each having a gate and a drain and a source, the first and second FET transistors having their gates tied to one another and said sources connected together such that the first and second FET transistors are in series; a third and a fourth FET transistor each having a gate and a drain and a source the third and fourth FET transistors having their gates tied to one another and said sources connected together such that the third and fourth FET transistors are in series and isolated from the first and second FET transistors; a bias resistor connected between said gates of the first and second FET transistors and said gates of the third and fourth FET transistors; a local oscillator (LO) balun having a first and a second output port for connection to said gates and sources of the first through fourth FET transistors such that the first and second FET transistors are driven on and off opposite to the third and fourth FET transistors and an unbalanced input port for connection to an external local oscillator source; a first capacitor connected in series with said first output port of the LO balun and with said gates belonging to the first and second FET transistors; a second capacitor connected in series with said second output port of the LO balun and with said gates belonging to the third and fourth FET transistors; and a reflection transformer coupled to said drains of said first, second, third and fourth FET transistors, said reflection transformer comprising a transmission line transformer having at least two ports, said ports connected such that nearly complete coupling of a signal between said ports relies on substantially complete reflection of energy at a reference plane of the transformer, said reference plane being defined by said first, second, third and fourth FET transistors.

Claim 3

The mixer of claim 1, wherein: the reflection transformer comprises a radio frequency (RF) input port for connection to an external radio frequency source, a four-wire switch port, and an intermediate frequency (IF) output port, said four-wire switch port connected to said drains of the first, second, third, and fourth FET transistors.

Claim 4

The mixer of claim 1, wherein: the reflection transformer comprises trifilar windings on a two-hole ferrite core or toroid.

Claim 5

The mixer of claim 1, wherein: the LO balun and said ports of the reflection transformer have characteristic impedances of approximately fifty ohms.

Claim 6

The mixer of claim 1, further comprising; a metal hermetic package in which substantially all of the components of the mixer are encased.

Claim 7

The mixer of claim 1, further comprising: an alumina ceramic substrate subjacent first FET, said second FET, said third FET, said fourth FET, and said bias resistor.

Claim 8

The mixer of claim 6, wherein: the first, second, third, and fourth FET transistors comprise a GaAs MESFET MMIC device mounted to the alumina substrate.

Claim 9

The mixer of claim 1, further comprising: a radio frequency (RF) balun for matching the impedance of an RF source to the reflection transformer.

Claim 10

The mixer of claim 1, further comprising: an intermediate frequency (IF) balun for matching the impedance of the reflection transformer to an IF output.

Claim 11

The mixer of claim 1, further comprising; a hermetic Kovar package in which substantially all of the components of the mixer are encased, the package conforming to an industry standard flat pack.

Claim 12

A mixer comprising: a first and a second FET transistor each having a gate and a drain and a source, the first and second FET transistors having their gates tied to one another and said sources of the first FET transistor connected to said drain of the second FET transistor; a third and a fourth FET transistor each having a gate and a drain and a source, the third and fourth FET transistors having their gates tied to one another and said source of the third FET transistor connected to said source of the fourth FET transistor; a bias resistor connected between said gates of the first and second FET transistors and said gates of the third and fourth FET transistors; a local oscillator (LO) balun having a first and a second output port and an unbalanced input port; a first capacitor connected in series with said first output port of the LO balun and with said gates belonging to the first and second FET transistors; a second capacitor connected in series with said second output port of the LO balun and with said gates belonging to the third and fourth FET transistors; and a reflection transformer coupled to said first, second, third and fourth FET transistors, said reflection transformer comprising a transmission line transformer having at least two ports, said ports connected such that nearly complete coupling of a signal between said ports relies on substantially complete reflection of energy at a reference plane of the transformer defined by said first, second, third and fourth FET transistors, said transmission line transformer having a system impedance of Z 0 , the reflection transformer including a radio frequency (RF) port and an intermediate frequency (IF) port and comprises first through sixth transmission line segments, said first, second, fourth, and fifth transmission lines being coupled to said RF port and having a transmission line characteristic impedance of Z 0 , said third and sixth transmission lines being coupled to said drains of said FET transistors and having a transmission line characteristic impedance of two times Z 0 , said first transmission line being positioned such that a zero degree incident wave relative phase angle at said RF port and a 180° reflected wave relative phase angle at a phase switching port causes a resultant relative phase angle of 180° at said IF port said phase switching port being located at said reference plane, said second transmission line being positioned such that a zero degree incident wave relative phase angle at said RF port and a zero degree reflected wave relative phase angle at said phase switching port causes a resultant relative phase angle of zero degrees at said IF port; said fourth transmission line being positioned such that a 180° incident wave relative phase angle at said RF port and a 180° reflected wave relative phase angle at said phase switching port causes a resultant relative phase angle of zero degrees at said IF port; and said fifth transmission line being positioned such that a 180° incident wave relative phase angle at said RF port and a zero degree reflected wave relative phase angle at said phase switching port causes a resultant relative phase angle of 180° at said IF port.

Claim 13

A mixer comprising: a first and a second FET transistor each having a gate and a drain and a source, the first and second FET transistors having their gates tied to one another and said sources of the first FET transistor connected to said drain of the second FET transistor; a third and a fourth FET transistor each having a gate and a drain and a source, the third and fourth FET transistors having their gates tied to one another and said source of the third FET transistor connected to said source of the fourth FET transistor; a bias resistor connected between said gates of the first and second FET transistors and said gates of the third and fourth FET transistors; a local oscillator (LO) balun having a first and a second output port and an unbalanced input port; a first capacitor connected in series with said first output port of the LO balun and with said gates belonging to the first and second FET transistors; a second capacitor connected in series with said second output port of the LO balun and with said gates belonging to the third and fourth FET transistors; and a reflection transformer coupled to said first, second, third and fourth FET transistors, said reflection transformer comprising a transmission line transformer having at least two ports, said ports connected such that nearly complete coupling of a signal between said ports relies on substantially complete reflection of energy at a reference plane of the transformer defined by said first, second, third and fourth FET transistors, said transmission line transformer having a system impedance of Z 0 , the reflection transformer including a radio frequency (RF) port and an intermediate frequency (IF) port and comprises first through sixth transmission line segments, said first, second, fourth, and fifth transmission lines being coupled to said RF port and having a transmission line characteristic impedance of Z 0 , said third and sixth transmission lines being coupled to said drains of said FET transistors and having a transmission line characteristic impedance of two times Z 0 , said first transmission line being positioned such that a zero degree incident wave relative phase angle at said RF port and a 180° reflected wave relative phase angle at a phase switching port causes a resultant relative phase angle of 180° at said IF port said phase switching port being located at said reference plane, said second transmission line being positioned such that a zero degree incident wave relative phase angle at said RF port and a zero degree reflected wave relative phase angle at said phase switching port causes a resultant relative phase angle of zero degrees at said IF port; said fourth transmission line being positioned such that a 180° incident wave relative phase angle at said RF port and a 180° reflected wave relative phase angle at said phase switching port causes a resultant relative phase angle of zero degrees at said IF port; and said fifth transmission line being positioned such that a 180° incident wave relative phase angle at said RF port and a zero degree reflected wave relative phase angle at said phase switching port causes a resultant relative phase angle of 180° at said IF port.