US5280648A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Double-balanced high level wide band RF mixer
Assignee: Zenith Electronics LLC
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Filing: 1991-08-16
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Granted: 1994-01-18
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Expires: 2011-08-16
Abstract
Abstract A double-balanced wide band RF mixer includes a first bifilar balun transformer coupling a high level source of RF signal to the primary windings of a pair of trifilar balun transformers. The two output windings of each trifilar transformer are connected in series with the drain-source circuits of a pair of FET transistors which are alternately activated by a symmetric local oscillator signal. An IF signal with reduced second order products of the RF signal is developed between the output windings of the two trifilar balun transformers.
Inventors
- 👤 Pierre Dobrovolny
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 07:22
CPC Classifications
H; H03; H03D; H03D9/00; H03D9/06; H03D9/0658; H03D9/0675; H03D2200/00; H03D2200/0001; H03D2200/0023; H03D2200/0041; H03D2200/0088; H03D2200/009; H03D7/00; H03D7/12; H03D7/125; H03D7/14
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
186 words
A double balanced mixer circuit comprising: first means providing a first input/output port; first and second transformer means, each coupled to said first means and each having first, second and third windings; first and second pairs of transistors, each transistor having a source terminal, a drain terminal and a gate terminal; means connecting one of said second and said third windings in each of said first and second transformer means in series with the drain and source terminals of a first of said transistors in each of said first and second pairs of transistors; connecting means for connecting the other of said second and said third windings of said first and second transformer means in series with the drain and source terminals of a second of said transistors in each of said first and second pairs of transistors; means for coupling a symmetrical local oscillator signal for alternately activating the gate terminals of each of said first and second pairs of transistors; and a second output/input port coupled between one of said second and said third windings of each of said first and second transformer means.
Claim 2
Dependent Claim
186 words
A double balanced mixer circuit comprising: first means providing a first input/output port; first and second transformer means, each coupled to said first means and each having first, second and third windings; first and second pairs of transistors, each transistor having a source terminal, a drain terminal and a gate terminal; means connecting one of said second and said third windings in each of said first and second transformer means in series with the drain and source terminals of a first of said transistors in each of said first and second pairs of transistors; connecting means for connecting the other of said second and said third windings of said first and second transformer means in series with the drain and source terminals of a second of said transistors in each of said first and second pairs of transistors; means for coupling a symmetrical local oscillator signal for alternately activating the gate terminals of each of said first and second pairs of transistors; and a second output/input port coupled between one of said second and said third windings of each of said first and second transformer means.
Claim 3
Dependent Claim
54 words
The mixer of claim 1 wherein said connecting means connects said second and said third windings of each of said first and second transformer means in series with the drain and source terminals of a corresponding one of said first and said second transistors in each of said first and second pairs of transistors.
Claim 4
Dependent Claim
85 words
The mixer of claim 1 wherein said connecting means connects said second windings of said first and second transformer means in series with the drain and source terminals of said first transistor of each of said first and second transistor pairs, said first transistors being alternately activated by said local oscillator signal, and connecting said third windings of said first and second transformer means in series with the drain and source terminals of said second transistor of each of said first and second transistor pairs.
Claim 5
Dependent Claim
25 words
The mixer of claim 3 wherein said first and second transformer means comprise respective first and second trifilar windings wound about a common toroidal core.
Claim 6
Dependent Claim
14 words
The mixer of claim 1 wherein said first means comprises a bifilar balun transformer.
Claim 7
Dependent Claim
13 words
The mixer of claim 1 wherein each of said transistors comprises a MESFET.
Claim 8
Dependent Claim
162 words
A double balanced mixer circuit comprising: first means providing a symmetric high level RF input signal; first and second trifilar transformer means, each coupled to said first means and each having first, second and third windings; first and second pairs of transistors, each transistor having a D.C. grounded source terminal, a drain terminal and a gate terminal; connecting means for connecting said second and third windings of each of said first and second trifilar transformer means in series with the drain and source terminals of a corresponding one of the transistors in each of said first and second pairs of transistors; second means for coupling a symmetrical local oscillator signal for alternately activating the gates of each of said first and second pairs of transistors; and an IF port coupled between the junction formed between said second and said third windings of each of said first and second trifilar transformer means for developing an output signal including a desired intermediate frequency component.
Claim 9
Dependent Claim
162 words
A double balanced mixer circuit comprising: first means providing a symmetric high level RF input signal; first and second trifilar transformer means, each coupled to said first means and each having first, second and third windings; first and second pairs of transistors, each transistor having a D.C. grounded source terminal, a drain terminal and a gate terminal; connecting means for connecting said second and third windings of each of said first and second trifilar transformer means in series with the drain and source terminals of a corresponding one of the transistors in each of said first and second pairs of transistors; second means for coupling a symmetrical local oscillator signal for alternately activating the gates of each of said first and second pairs of transistors; and an IF port coupled between the junction formed between said second and said third windings of each of said first and second trifilar transformer means for developing an output signal including a desired intermediate frequency component.
Claim 10
Dependent Claim
14 words
The mixer of claim 7 wherein said first means comprises a bifilar balun transformer.
Claim 11
Dependent Claim
13 words
The mixer of claim 7 wherein each of said transistors comprises a MESFET.
Claim 12
Dependent Claim
201 words
A double balanced mixer circuit comprising: first means providing a symmetric high level RF input signal; first and second trifilar transformer means, each coupled to said first means and each having first, second and third windings; first and second pairs of transistors, each transistor having a D.C. grounded source terminal, a drain terminal and a gate terminal; a local oscillator signal for alternately activating the gates of each of said first and second pairs of transistors; connecting means for connecting said second windings of said first and second trifilar transformer means in series with the drain and source terminals of a first transistor in each of said first and second transistor pairs, said first transistors being alternately activated by said local oscillator signal, and connecting said third windings of said first and second trifilar transformer means in series with the drain and source terminals of second transistors in each of said first and second transistor pairs; and an IF port coupled between the second winding of one of said first and second trifilar transformer means and the third winding of the other of said first and second trifilar transformer means for developing an output signal including a desired intermediate frequency component.
Claim 13
Dependent Claim
201 words
A double balanced mixer circuit comprising: first means providing a symmetric high level RF input signal; first and second trifilar transformer means, each coupled to said first means and each having first, second and third windings; first and second pairs of transistors, each transistor having a D.C. grounded source terminal, a drain terminal and a gate terminal; a local oscillator signal for alternately activating the gates of each of said first and second pairs of transistors; connecting means for connecting said second windings of said first and second trifilar transformer means in series with the drain and source terminals of a first transistor in each of said first and second transistor pairs, said first transistors being alternately activated by said local oscillator signal, and connecting said third windings of said first and second trifilar transformer means in series with the drain and source terminals of second transistors in each of said first and second transistor pairs; and an IF port coupled between the second winding of one of said first and second trifilar transformer means and the third winding of the other of said first and second trifilar transformer means for developing an output signal including a desired intermediate frequency component.
Claim 14
Dependent Claim
26 words
The mixer of claim 10 wherein said first and second trifilar transformer means comprise respective first and second trifilar windings wound about a common toroidal core.
Claim 15
Dependent Claim
14 words
The mixer of claim 10 wherein said first means comprises a bifilar balun transformer.
Claim 16
Dependent Claim
13 words
The mixer of claim 10 wherein each of said transistors comprises a MESFET.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1997-01-17 | 1997-07-19 | 1998-01-18 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2001-01-17 | 2001-07-19 | 2002-01-18 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2005-01-17 | 2005-07-19 | 2006-01-18 | $7700.00 | Window Closed / Lapsed |