Voltage-limiting circuit with hysteresis comparator

Claim 2

A voltage-limiting circuit which maintains a value of a supply voltage provided by a supply circuit, at an output of the voltage-limiting circuit, between a minimum value and a maximum value, the voltage-limiting circuit comprising: resistive means, having an input coupled to the supply voltage and an output, for providing a current proportional to the supply voltage; a current-controlled voltage source having an input coupled to the output of the resistive means, which provides a reference current proportional to the current and a reference voltage proportional to the reference current; and a hysteresis comparator including at least one P-channel transistor and at least one N-channel transistor which receives the reference voltage at a first input and provides a binary signal at an output, such that the binary signal goes to a first state when the reference voltage reaches the maximum value and goes to a second state if the supply voltage reaches the minimum value.

Claim 3

The circuit according to claim 1, wherein the resistive means and the current controlled voltage source include a resistive circuit connected to the output of the supply circuit, a first amplification transistor having its drain and source series-connected between the resistive circuit and a reference terminal, and a second amplification transistor having its base coupled to a base of the first amplification transistor, a drain, and a source coupled to the reference terminal, the second amplification transistor forming a current mirror with the first amplification transistor to produce the reference current at the drain of the second amplification transistor, such that the reference current is proportional to the current flowing through the resistive circuit.

Claim 4

The circuit according to claim 2 wherein the resistive circuit comprises a first P-type transistor and a second P-type transistor, series-connected between the output of the supply circuit and the drain of first amplification transistor, the first P-type transistor having its control gate connected to its drain, the second P-type transistor having its control gate connected to a bias voltage so as to keep the consumption current through the resistive means at substantially zero when the supply voltage is less than the bias voltage plus a threshold voltage of the resistive means.

Claim 5

The circuit according to one of claims 2, wherein the current-controlled voltage source has at least one reference resistor series-connected between a bias voltage and the drain of the second amplification transistor.

Claim 6

The circuit according to claim 4 wherein the reference resistor is a P-type transistor whose control gate is connected to the reference terminal.

Claim 7

The circuit according to claim 4, wherein the first input of the hysteresis comparator is coupled to the series connection of the second amplification transistor and the reference resistor.

Claim 8

The voltage-limiting circuit of claim 1, wherein the voltage-limiting circuit is an integrated circuit coupled to the supply circuit.

Claim 9

The voltage-limiting circuit as claimed in claim 1, wherein the resistive means provides substantially zero current when the supply voltage is lower than a bias voltage plus a threshold voltage of the resistive means.

Claim 10

The voltage-limiting circuit as claimed in claim 1, further comprising the supply circuit which provides the supply voltage at the output and wherein the supply voltage is greater than an internal voltage generated by the supply circuit.

Claim 11

The voltage-limiting circuit as claimed in claim 1, further comprising the supply circuit having an input coupled to a control signal, such that the supply circuit supplies the supply voltage in response to the control signal in the first state and does not supply the supply voltage in response to the control signal in the second state.

Claim 12

A circuit according to claim 3, wherein the current-controlled voltage source has at least one reference resistor series-connected between the bias voltage and the drain of the second amplification transistor.

Claim 13

A voltage-limiting circuit which maintains a value of a supply voltage provided by a supply circuit, at an output of the voltage-limiting circuit, between a minimum value and a maximum value, the voltage-limiting circuit comprising: a resistive circuit, having an input coupled to the supply voltage and an output, which provides a current proportional to the supply voltage; a current-controlled voltage source, having an input coupled to the output of the resistive circuit, which provides a reference current proportional to the current and provides, at an output, a reference voltage proportional to the reference current; and a comparator circuit, including at least one P-channel transistor and at least one N-channel transistor, having a first input coupled to the output of the current-controlled voltage source, which provides at an output an enable signal which goes to a first state when the supply voltage reaches the maximum value and which goes to a second state when the supply voltage reaches the minimum value.

Claim 14

A voltage-limiting circuit which maintains a value of a supply voltage provided by a supply circuit, at an output of the voltage-limiting circuit, between a minimum value and a maximum value, the voltage-limiting circuit comprising: a resistive circuit, having an input coupled to the supply voltage and an output, which provides a current proportional to the supply voltage; a current-controlled voltage source, having an input coupled to the output of the resistive circuit, which provides a reference current proportional to the current and provides, at an output, a reference voltage proportional to the reference current; and a comparator circuit, including at least one P-channel transistor and at least one N-channel transistor, having a first input coupled to the output of the current-controlled voltage source, which provides at an output an enable signal which goes to a first state when the supply voltage reaches the maximum value and which goes to a second state when the supply voltage reaches the minimum value.

Claim 15

The voltage-limiting circuit as claimed in claim 12, wherein the resistive circuit includes a first transistor and a second transistor, connected in series, between the output of the supply circuit and the input of the current controlled voltage source, the first transistor having a control gate connected to the drain, the second transistor having a control gate connected to a bias voltage, so as to keep the current through the resistive circuit at substantially zero when the supply voltage is less than the bias voltage plus a threshold voltage of the resistive circuit.

Claim 16

The voltage-limiting circuit as claimed in claim 13, wherein the current controlled voltage source comprises a first amplification transistor and a second amplification transistor connected to form a current mirror wherein a drain of the first amplification transistor is coupled to the source of the second transistor, a drain of the second amplification transistor forms the output of the resistive circuit, a gate of the first amplification transistor is coupled to a gate of the second amplification transistor, and a source of the first amplification transistor and a source of the second amplification transistor are each coupled to a reference terminal.

Claim 17

The voltage-limiting circuit as claimed in claim 12, wherein the current-controlled voltage source includes at least one reference transistor having its drain and its source respectively coupled between a bias voltage and the output of the resistive circuit.

Claim 18

A voltage-limiting circuit which limits a value of a supply voltage provided by a supply circuit, at an output of the voltage-limiting circuit, the voltage-limiting circuit comprising: a resistive circuit, having an input coupled to the supply voltage and an output, which provides a current proportional to the supply voltage; a current-controlled voltage source, having an input coupled to the output of the resistive circuit, which provides at an output a reference voltage proportional to the current; a comparator circuit, having a first input coupled to the output of the current-controlled voltage source, which provides an output an enable signal which goes to a first state when the supply voltage reaches a maximum value and which goes to a second state when the supply voltage reaches a minimum value; and wherein the resistive circuit includes a first transistor and a second transistor, connected in series, a drain of the first transistor being coupled to the supply voltage and a source of the second transistor being coupled to the input of the current-controlled voltage source, the first transistor having a control gate connected to the drain, the second transistor having a control gate connected to the bias voltage so as to keep the current through the resistive circuit at substantially zero when the supply voltage is less than the bias voltage plus a threshold voltage of the resistive circuit.

Claim 19

A voltage-limiting circuit which limits a value of a supply voltage provided by a supply circuit, at an output of the voltage-limiting circuit, the voltage-limiting circuit comprising: a resistive circuit, having an input coupled to the supply voltage and an output, which provides a current proportional to the supply voltage; a current-controlled voltage source, having an input coupled to the output of the resistive circuit, which provides at an output a reference voltage proportional to the current; a comparator circuit, having a first input coupled to the output of the current-controlled voltage source, which provides an output an enable signal which goes to a first state when the supply voltage reaches a maximum value and which goes to a second state when the supply voltage reaches a minimum value; and wherein the resistive circuit includes a first transistor and a second transistor, connected in series, a drain of the first transistor being coupled to the supply voltage and a source of the second transistor being coupled to the input of the current-controlled voltage source, the first transistor having a control gate connected to the drain, the second transistor having a control gate connected to the bias voltage so as to keep the current through the resistive circuit at substantially zero when the supply voltage is less than the bias voltage plus a threshold voltage of the resistive circuit.

Claim 20

The voltage-limiting circuit as claimed in claim 16, wherein the current controlled voltage source comprises a first amplification transistor and a second amplification transistor connected to form a current mirror wherein a drain of the first amplification transistor is coupled to the source of the second transistor, a drain of the second amplification transistor forms the output of the current mirror circuit, a gate of the first amplification transistor is coupled to a gate of the second amplification transistor, and a source of the first amplification transistor and a source of the second amplification transistor are each coupled to a reference terminal.

Claim 21

A voltage-limiting circuit which maintains a value of a supply voltage provided by a supply circuit, at an output of the voltage-limiting circuit, the voltage-limiting circuit comprising: resistive means, having an input coupled to the supply voltage and an output, for providing a current proportional to the supply voltage; a current-controlled voltage source having an input coupled to the output of the resistive means, including a current mirror circuit that provides a reference current proportional to the current and that provides a reference voltage proportional to the reference current; a hysteresis comparator including at least one P-channel transistor and at least one N-channel transistor which receives the reference voltage at a first input and provides a binary signal at an output, such that the binary signal goes to a first state when the reference voltage reaches a maximum value and goes to a second state if the supply voltage reaches a minimum value; wherein the resistive circuit comprises a first P-type transistor and a second P-type transistor connected in series, a drain of the first P-type transistor coupled to the output of the supply circuit and a source of the second P-type transistor coupled to the input of the current controlled voltage source, the first P-type transistor having a control gate connected to the drain, the second P-type transistor having a control gate connected to a bias voltage; and a means, coupled to the current mirror and responsive to a limitation control signal, for canceling the reference current flowing through the current mirror when the limitation control signal is in a first state.

Claim 22

A voltage-limiting circuit which maintains a value of a supply voltage provided by a supply circuit, at an output of the voltage-limiting circuit, the voltage-limiting circuit comprising: resistive means, having an input coupled to the supply voltage and an output, for providing a current proportional to the supply voltage; a current-controlled voltage source having an input coupled to the output of the resistive means, including a current mirror circuit that provides a reference current proportional to the current and that provides a reference voltage proportional to the reference current; a hysteresis comparator including at least one P-channel transistor and at least one N-channel transistor which receives the reference voltage at a first input and provides a binary signal at an output, such that the binary signal goes to a first state when the reference voltage reaches a maximum value and goes to a second state if the supply voltage reaches a minimum value; wherein the resistive circuit comprises a first P-type transistor and a second P-type transistor connected in series, a drain of the first P-type transistor coupled to the output of the supply circuit and a source of the second P-type transistor coupled to the input of the current controlled voltage source, the first P-type transistor having a control gate connected to the drain, the second P-type transistor having a control gate connected to a bias voltage; and a means, coupled to the current mirror and responsive to a limitation control signal, for canceling the reference current flowing through the current mirror when the limitation control signal is in a first state.