Method for emulating guest instructions on a host computer through dynamic recompilation of host instructions

Claim 1

A method of translating guest instructions to host instructions executable on a host processor, comprising: a. determining length of one of the guest instructions based on a dynamic recompiling offset table; b. generating a multi-word entry of host instructions in a memory if the length is greater than a certain number of bytes; c. generating an inline entry of host instructions in the memory if the guest instruction is not greater than the certain number of bytes and the inline entry constitutes a predetermined first number of host instructions; and d. returning to step a. to calculate the length of a next guest instruction.

Claim 2

A method of translating guest instructions to host instructions executable on a host processor, comprising: a. determining length of one of the guest instructions based on a dynamic recompiling offset table; b. generating a multi-word entry of host instructions in a memory if the length is greater than a certain number of bytes; c. generating an inline entry of host instructions in the memory if the guest instruction is not greater than the certain number of bytes and the inline entry constitutes a predetermined first number of host instructions; and d. returning to step a. to calculate the length of a next guest instruction.

Claim 6

A method of dispatching host instructions, corresponding to a guest instruction, executable on a host processor, comprising: a. storing the guest instruction in a first memory; b. generating an address having a first tag and corresponding to the guest instruction; c. storing in a line of a second memory a series of host instructions and a second tag corresponding to the series. wherein the series of host instructions are generated based on an interpretive dispatch table entry, wherein the interpretive dispatch table entry includes a first host instruction of the series of host instructions; d. mapping the address to the second memory to access the second tag; e. comparing the first tag and the second tag; and f. executing the series of host instructions if the first tag and the second tag match or filling the second memory with a second series of host instructions and a third tag corresponding to the first tag of the address if the first tag and the second tag do not match; wherein the line of the second memory comprises a plurality of line entries; wherein the step of filling comprises filling a line entry of the line of the second memory with the second series of host instructions and continuing to fill all other line entries of the line of the second memory with replacement host instructions; and wherein, if fewer than all of the line entries of the second memory are filled with host instructions emulating to a guest instruction, then the line entries of the second memory that are not filled with host instructions emulating to a guest instruction are filled with replacement host instructions which invoke a dynamic recompilation process.

Claim 7

A method of dispatching host instructions, corresponding to a guest instruction, executable on a host processor, comprising: a. storing the guest instruction in a first memory; b. generating an address having a first tag and corresponding to the guest instruction; c. storing in a line of a second memory a series of host instructions and a second tag corresponding to the series. wherein the series of host instructions are generated based on an interpretive dispatch table entry, wherein the interpretive dispatch table entry includes a first host instruction of the series of host instructions; d. mapping the address to the second memory to access the second tag; e. comparing the first tag and the second tag; and f. executing the series of host instructions if the first tag and the second tag match or filling the second memory with a second series of host instructions and a third tag corresponding to the first tag of the address if the first tag and the second tag do not match; wherein the line of the second memory comprises a plurality of line entries; wherein the step of filling comprises filling a line entry of the line of the second memory with the second series of host instructions and continuing to fill all other line entries of the line of the second memory with replacement host instructions; and wherein, if fewer than all of the line entries of the second memory are filled with host instructions emulating to a guest instruction, then the line entries of the second memory that are not filled with host instructions emulating to a guest instruction are filled with replacement host instructions which invoke a dynamic recompilation process.

Claim 8

A method of dynamically recompiling (DR) host instructions executable on a host processor and emulating guest instructions, comprising: a. providing a first memory storing the host instructions by: allocating an address space for an interpretive dispatch table, wherein each entry in the interpretive dispatch table includes a first host instruction for emulation of a guest instruction; allocating an address space for a DR offset table; and allocating an address space for a DR semantic routine accessible via the DR offset table, wherein subsequent host instructions for emulation of the guest instruction are stored in the DR semantic routine; b. providing a second memory having lines with line entries for storing dynamically recompiled host instructions; and c. copying a! at least one host instruction from the first memory into a line entry of a line of the second memory.

Claim 9

A method of dynamically recompiling (DR) host instructions executable on a host processor and emulating guest instructions, comprising: a. providing a first memory storing the host instructions by: allocating an address space for an interpretive dispatch table, wherein each entry in the interpretive dispatch table includes a first host instruction for emulation of a guest instruction; allocating an address space for a DR offset table; and allocating an address space for a DR semantic routine accessible via the DR offset table, wherein subsequent host instructions for emulation of the guest instruction are stored in the DR semantic routine; b. providing a second memory having lines with line entries for storing dynamically recompiled host instructions; and c. copying a! at least one host instruction from the first memory into a line entry of a line of the second memory.

Claim 12

A method of translating a guest instruction to host instructions executable on a host processor, comprising: determining if an entry of host instructions corresponding to the guest instruction is present in a memory; if the entry of host instructions is not present in the memory, determining length of the guest instruction based on a dynamic recompiling offset table; and if the length of the guest instruction is greater than a predetermined number of bytes: generating the entry of host instructions as a multi-word entry of host instructions; and storing the entry of host instructions in the memory.

Claim 13

A method of translating a guest instruction to host instructions executable on a host processor, comprising: determining if an entry of host instructions corresponding to the guest instruction is present in a memory; if the entry of host instructions is not present in the memory, determining length of the guest instruction based on a dynamic recompiling offset table; and if the length of the guest instruction is greater than a predetermined number of bytes: generating the entry of host instructions as a multi-word entry of host instructions; and storing the entry of host instructions in the memory.

Claim 14

A method of translating a guest instruction to host instructions executable on a host processor, comprising: determining if an entry of host instructions corresponding to the guest instruction is present in a memory; if the entry of host instructions is not present in the memory, determining length of the guest instruction based on a dynamic recompiling offset table; if the length of the guest instruction is not greater than a predetermined number of bytes and a predetermined first number of host instructions emulate the guest instruction, generating the entry of host instructions as an inline entry of host instructions; and storing the entry of host instructions in the memory.

Claim 15

A method of translating a guest instruction to host instructions executable on a host processor, comprising: determining if an entry of host instructions corresponding to the guest instruction is present in a memory; if the entry of host instructions is not present in the memory, determining length of the guest instruction based on a dynamic recompiling offset table; if the length of the guest instruction is not greater than a predetermined number of bytes and a predetermined first number of host instructions emulate the guest instruction, generating the entry of host instructions as an inline entry of host instructions; and storing the entry of host instructions in the memory.

Claim 17

A method of translating a guest instruction to host instructions executable on a host processor, comprising: determining length of the guest instruction using a dynamic recompiling offset table; generating an entry of host instructions as an inline entry of host instructions if the guest instruction is not greater than a predetermined number of bytes and the inline entry constitutes a predetermined number of host instructions.

Claim 18

A method of translating a guest instruction to host instructions executable on a host processor, comprising: determining length of the guest instruction using a dynamic recompiling offset table; generating an entry of host instructions as an inline entry of host instructions if the guest instruction is not greater than a predetermined number of bytes and the inline entry constitutes a predetermined number of host instructions.